M27C1024-12XN1TR 반도체 회로 부품 판매점
1 Mbit 64Kb x16 UV EPROM and OTP EPROM
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 STMicroelectronics |
M27C1024
1 Mbit (64Kb x16) UV EPROM and OTP EPROM
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
FAST ACCESS TIME: 35ns
LOW POWER CONSUMPTION:
– Active Current 35mA at 5MHz
– Standby Current 100µA
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIME: 100µs/byte (typical)
ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Device Code: 008Ch
40
1
FDIP40W (F)
40
1
PDIP40 (B)
DESCRIPTION
The M27C1024 is a 1 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large data or program
storage and is organized as 65,536 words of 16
bits.
The FDIP40W (window ceramic frit-seal package)
has a transparent lid which allows the user to
expose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written to the
device by following the programming procedure.
For application where the content is programmed
only one time and erasure is not required, the
M27C1024 is offered in PDIP40, PLCC44 and
TSOP40 (10 x 14mm) packages.
PLCC44 (C)
TSOP40 (N)
10 x 14mm
Figure 1. Logic Diagram
VCC VPP
16
A0-A15
16
Q0-Q15
Table 1. Signal Names
A0-A15
Q0-Q15
Address Inputs
Data Outputs
E Chip Enable
G Output Enable
P Program
VPP Program Supply
VCC Supply Voltage
VSS Ground
P M27C1024
E
G
VSS
AI00702B
September 1998
1/15
M27C1024
Figure 2A. DIP Pin Connections
VPP
E
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
VSS
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
G
1 40 VCC
2 39 P
3 38 NC
4 37 A15
5 36 A14
6 35 A13
7 34
8 33
9 32
10 31
M27C1024
11 30
12 29
13 28
14 27
15 26
16 25
17 24
18 23
19 22
20 21
A12
A11
A10
A9
VSS
A8
A7
A6
A5
A4
A3
A2
A1
A0
AI00703
Warning: NC = Not Connected.
Figure 2C. TSOP Pin Connections
A9
A10
A11
A12
A13
A14
A15
NC
P
VCC
VPP
E
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
1 40
10 M27C1024 31
11 (Normal) 30
20 21
AI01582
VSS
A8
A7
A6
A5
A4
A3
A2
A1
A0
G
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS
Warning: NC = Not Connected.
2/15
Figure 2B. LCC Pin Connections
Q12
Q11
Q10
Q9
Q8
VSS
NC
Q7
Q6
Q5
Q4
12
1 44
M27C1024
23
A13
A12
A11
A10
A9
34 VSS
NC
A8
A7
A6
A5
AI00704
Warning: NC = Not Connected.
DEVICE OPERATION
The modes of operations of the M27C1024 are
listed in the OperatingModes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for Vpp and 12V on A9 for
Electronic Signature.
Read Mode
The M27C1024 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV) is equalto the delay from E to output (tELQV).
Data is available at the output after a delay of tOE
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least tAVQV-tGLQV.
Standby Mode
The M27C1024 has a standby mode which re-
duces the active current from 35mA to 100µA.
The M27C1024 is placed in the standby mode by
applying a TTL high signal to the E input. When in
the standby mode, the outputs are in a high imped-
ance state, independent of the G input.
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