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ATMEL Corporation |
AT27C2048
Features
• Fast Read Access Time - 55 ns
• Low Power CMOS Operation
– 100 µA Maximum Standby
– 35 mA Maximum Active at 5 MHz
• JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm X 14 mm)
• Direct Upgrade from 512K bit and 1M bit
(AT27C516 and AT27C1024) EPROMs
• 5V ± 10% Power Supply
• High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 50 µs/word (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Description
The AT27C2048 is a low-power, high performance 2,097,152-bit one-time program-
mable read only memory (OTP EPROM) organized 128K by 16 bits. It requires a sin-
gle 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16 and 32 bit microprocessor
systems.
Pin Configurations
PDIP Top View
(continued)
Pin Name Function
A0 - A16 Addresses
O0 - O15 Outputs
CE Chip Enable
OE Output Enable
PGM
Program
NC
Note:
No Connect
Both GND pins must be con-
nected.
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
GND
O7
O6
O5
O4
O3
O2
O1
O0
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 VCC
39 PGM
38 A16
37 A15
36 A14
35 A13
34 A12
33 A11
32 A10
31 A9
30 GND
29 A8
28 A7
27 A6
26 A5
25 A4
24 A3
23 A2
22 A1
21 A0
PLCC Top View
O12
O11
O10
O9
O8
GND
NC
O7
O6
O5
O4
7
8
9
10
11
12
13
14
15
16
17
39 A13
38 A12
37 A11
36 A10
35 A9
34 GND
33 NC
32 A8
31 A7
30 A6
29 A5
Note: PLCC package pins 1 and 23
are DON’T CONNECT.
TSOP Top View
Type 1
A9
A10
A11
A12
A13
A14
A15
A16
PGM
VCC
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 GND
39 A8
38 A7
37 A6
36 A5
35 A4
34 A3
33 A2
32 A1
31 A0
30 OE
29 O0
28 O1
27 O2
26 O3
25 O4
24 O5
23 O6
22 O7
21 GND
2-Megabit
(128K x 16)
OTP EPROM
AT27C2048
0632B-A–06/97
1
Description
In read mode, the AT27C2048 typically consumes 15 mA.
Standby mode supply current is typically less than 10 µA.
The AT27C2048 is available in industry standard
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, and TSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in
high-speed systems.
With high density 128K word storage capability, the
AT27C2048 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass storage
media.
Atmel’s AT27C2048 has additional features that ensure
high quality and efficient production use. The Rapid™ Pro-
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program-
ming time is typically only 50 µs/word. The Integrated Prod-
uct Identification Code electronically identifies the device
and manufacturer. This feature is used by industry stan-
dard programming equipment to select the proper program-
ming algorithms and voltages.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the VCC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
2 AT27C2048
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