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ATMEL Corporation |
AT27C1024
Features
• Fast Read Access Time - 45 ns
• Low Power CMOS Operation
– 100 µA max. Standby
– 30 mA max. Active at 5 MHz
• JEDEC Standard Packages
– 40-Lead 600-mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm x 14 mm)
• Direct Upgrade from 512K (AT27C516) EPROM
• 5V ± 10% Power Supply
• High Reliability CMOS Technology
– 2000V ESD Protection
– 200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 100 µs/word (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Description
The AT27C1024 is a low-power, high-performance 1,048,576 bit one-time program-
mable read only memory (OTP EPROM) organized 64K by 16 bits. It requires only
one 5V power supply in normal read mode operation. Any word can be accessed in
less than 45 ns, eliminating the need for speed reducing WAIT states. The by-16
organization make this part ideal for high-performance 16- and 32-bit microprocessor
systems.
(continued)
AT27C1024
1-Megabit
(64K x 16)
OTP EPROM
AT27C1024
Pin Configurations
Pin Name Function
A0 - A15 Addresses
O0 - O15 Outputs
CE Chip Enable
OE Output Enable
PGM
Program Strobe
NC
Note:
No Connect
Both GND pins must be
connected.
PDIP Top View
PLCC Top View
TSOP Top View
Type 1
0019I-A–7/97
1
AT27C1024
In read mode, the AT27C1024 typically consumes 15 mA.
Standby mode supply current is typically less than 10 µA.
The AT27C1024 is available in industry standard JEDEC-
approved one-time programmable (OTP) plastic PDIP,
PLCC, and TSOP packages. The device features two-line
control (CE, OE) to eliminate bus contention in high-speed
systems.
With high density 64K word storage capability, the
AT27C1024 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass storage
media.
Atmel’s 27C1024 have additional features to ensure high
quality and efficient production use. The Rapid™ Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 µs/word. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the VCC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
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