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ATMEL Corporation |
AT27C040
Features
• Fast Read Access Time - 70 ns
• Low Power CMOS Operation
100 µA max. Standby
30 mA max. Active at 5 MHz
• JEDEC Standard Packages
32-Lead 600-mil PDIP
32-Lead 450-mil SOIC (SOP)
32-Lead PLCC
32-Lead TSOP
• 5V ± 10% Supply
• High Reliability CMOS Technology
2000V ESD Protection
200 mA Latchup Immunity
• Rapid™Programming Algorithm - 100 µs/byte (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Description
The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time pro-
grammable read only memory (OTP EPROM) organized as 512K by 8 bits. The
AT27C040 requires only one 5V power supply in normal read mode operation. Any
byte can be accessed in less than 70 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel's scaled CMOS technology provides low active power consumption, and fast
programming. Power consumption is typically 8 mA in active mode and less than 10
µA in standby mode.
(continued)
Pin Configurations
Pin Name Function
PDIP, SOIC Top View
A0 - A18 Addresses
O0 - O7 Outputs
CE Chip Enable
OE Output Enable
4-Megabit
(512K x 8)
OTP EPROM
AT27C040
PLCC Top View
TSOP Top View
0189E-A–7/97
1
The AT27C040 is available in a choice of industry standard
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, SOIC (SOP), and TSOP packages. The
device features two-line control (CE, OE) to eliminate bus
contention in high-speed systems.
Atmel's AT27C040 has additional features to ensure high
quality and efficient production use. The Rapid™Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 µs/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
Switching Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the VCC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
2 AT27C040
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