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Siemens Semiconductor Group |
1M x 16-Bit Dynamic RAM
(1k & 4k -Refresh)
HYB3116160BSJ/BST(L)-50/-60/-70
HYB3118160BSJ/BST(L)-50/-60/-70
Advanced Information
• 1 048 576 words by 16-bit organization
• 0 to 70 °C operating temperature
• Performance:
tRAC
tCAC
tAA
tRC
tPC
RAS access time
CAS access time
Access time from address
Read/Write cycle time
Fast page mode cycle time
-50 -60 -70
50 60 70 ns
13 15 20 ns
25 30 35 ns
90 110 130 ns
35 40 45 ns
• Single + 3.3 V (± 0.3 V) supply
• Low power dissipation
max. 720 active mW ( HYB3118160BSJ/BST-50)
max. 648 active mW ( HYB3118160BSJ/BST-60)
max. 576 active mW ( HYB3118160BSJ/BST-70)
max. 360 active mW ( HYB3116160BSJ/BST-50)
max. 324 active mW ( HYB3116160BSJ/BST-60)
max. 288 active mW ( HYB3116160BSJ/BST-70)
7.2 mW standby (LV-TTL)
3.6 mW standby (LV-CMOS)
720 µW standby for L-version
• Output unlatched at cycle end allows two-dimensional chip selection
• Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh,
self refresh
• Fast page mode capability
• 2 CAS / 1 WE
• All inputs, outputs and clocks fully LV-TTL-compatible
• 1024 refresh cycles / 16 ms for HYB 3118160BSJ
• 4096 refresh cycles / 64 ms for HYB 3116160BSJ
• Plastic Package:
P-SOJ-42-1 400 mil
P-TSOPII-50/44-1 400mil
Semiconductor Group
1
1.96
HYB3116(8)160BSJ/BST(L)-50/-60/-70
3.3V 1M x 16-DRAM
The HYB 3116(8)160BSJ/BST is a 16 MBit dynamic RAM organized as 1 048 576 words by 16 bits.
The HYB 3116(8)160BSJ/BST utilizes a submicron CMOS silicon gate process technology, as well
as advanced circuit techniques to provide wide operating margins, both internally and for the system
user. Multiplexed address inputs permit the HYB 3116(8)160BSJ/BST to be packaged in standard
SOJ-42 and TSOPII-50/44 plastic package with 400mil width. These packages provide high system
bit densities and are compatible with commonly used automatic testing and insertion equipment.
System-oriented features include single + 3.3 V (± 0.3 V) power supply, direct interfacing with high-
performance logic device families.The HYB3116160BSTL parts have a very low power „sleep
mode“ suppported by Self Refresh.
Ordering Information
Type
HYB 3116160BSJ-50
HYB 3116160BSJ-60
HYB 3116160BSJ-70
HYB 3118160BSJ-50
HYB 3118160BSJ-60
HYB 3118160BSJ-70
HYB 3116160BST-50
HYB 3116160BST-60
HYB 3116160BST-70
HYB 3118160BST-50
HYB 3118160BST-60
HYB 3118160BST-70
Ordering Code
on request
on request
on request
on request
on request
on request
on request
on request
on request
on request
on request
on request
Package
P-SOJ-42 400 mil
P-SOJ-42 400 mil
P-SOJ-42 400 mil
P-SOJ-42 400 mil
P-SOJ-42 400 mil
P-SOJ-42 400 mil
P-TSOPII-50/44 400 mil
P-TSOPII-50/44 400 mil
P-TSOPII-50/44 400 mil
P-TSOPII-50/44 400 mil
P-TSOPII-50/44 400 mil
P-TSOPII-50/44 400 mil
Descriptions
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
Pin Names
A0 to A9
A0 to A9
A0 to A11
A0 to A7
RAS
OE
I/O1-I/O16
UCAS
LCAS
WE
VCC
VSS
N.C.
Row Address Inputs for 1k-refresh version HYB3118160BSJ/BST
Column Addess Inputs for 1k-refresh version HYB3118160BSJ/BST
Row Address Inputs for 4k-refresh version HYB3116160BSJ/BST
Column Address Inputs for 4k-refresh version HYB3116160BSJ/BST
Row Address Strobe
Output Enable
Data Input/Output
Upper Column Address Strobe
Lower Column Address Strobe
Read/Write Input
Power Supply (+ 3.3 V)
Ground (0 V)
not connected
Semiconductor Group
2
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