AT45D081-RC 반도체 회로 부품 판매점
8-Megabit 5-volt Only Serial DataFlash
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 ATMEL Corporation |
AT45D081
Features
• Single 4.5V - 5.5V Supply
• Serial Interface Architecture
• Page Program Operation
– Single Cycle Reprogram (Erase and Program)
– 4096 Pages (264 Bytes/Page) Main Memory
• Two 264-Byte Data Buffers – Allows Receiving of Data while Reprogramming of
Non-Volatile Memory
• Internal Program and Control Timer
• Fast Page Program Time – 7 ms Typical
• 80 µs Typical Page to Buffer Transfer Time
• Low Power Dissipation
– 15 mA Active Read Current Typical
– 10 µA CMOS Standby Current Typical
• 10 MHz Max Clock Frequency
• Hardware Data Protection Feature
• Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3
• CMOS and TTL Compatible Inputs and Outputs
• Commercial and Industrial Temperature Ranges
Description
The AT45D081 is a 5-volt only, serial interface Flash memory suitable for in-system
reprogramming. Its 8,650,752 bits of memory are organized as 4096 pages of 264-
bytes each. In addition to the main memory, the AT45D081 also contains two data
buffers of 264-bytes each. The buffers allow receiving of data while a page in the main
memory is being reprogrammed. Unlike conventional Flash memories that are
accessed randomly with multiple address lines and a parallel interface, the DataFlash
uses a serial interface to sequentially access its data. The simple serial interface facil-
itates hardware layout, increases system reliability, minimizes switching noise, and
Pin Configurations
(continued)
Pin Name
CS
SCK
SI
SO
WP
RESET
RDY/BUSY
Function
Chip Select
Serial Clock
Serial Input
Serial Output
Hardware Page Write
Protect Pin
Chip Reset
Ready/Busy
TSOP Top View
Type 1
SOIC
GND
NC
NC
CS
SCK
SI
SO
NC
NC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 NC
26 NC
25 WP
24 RESET
23 RDY/BUSY
22 NC
21 NC
20 NC
19 NC
18 NC
17 NC
16 NC
15 NC
RDY/BUSY
RESET
WP
NC
NC
NC
VCC
GND
NC
NC
NC
NC
CS
SCK
SI
SO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 NC
31 NC
30 NC
29 NC
28 NC
27 NC
26 NC
25 NC
24 NC
23 NC
22 NC
21 NC
20 NC
19 NC
18 NC
17 NC
8-Megabit
5-volt Only
Serial
DataFlash™
AT45D081
0871A-A–6/97
1
reduces package size and active pin count. The device is
optimized for use in many commercial and industrial appli-
cations where high density, low pin count, low voltage, and
low power are essential. Typical applications for the
DataFlash are digital voice storage, image storage, and
data storage. The device operates at clock frequencies up
to 10 Mhz with a typical active read current consumption of
15 mA.
To allow for simple in-system reprogrammability, the
AT45D081 does not require high input voltages for pro-
gramming. The device operates from a single power sup-
ply, 4.5V to 5.5V, for both the program and read opera-
tions. The AT45D081 is enabled through the chip select pin
(CS) and accessed via a three-wire interface consisting of
the Serial Input (SI), Serial Output (SO), and the Serial
Clock (SCK).
All programming cycles are self-timed, and no separate
erase cycle is required before programming.
Block Diagram
WP FLASH MEMORY ARRAY
PAGE (264 BYTES)
BUFFER 1 (264 BYTES)
BUFFER 2 (264 BYTES)
SCK
CS
RESET
VCC
GND
RDY/BUSY
I/O INTERFACE
SI SO
Device Operation
The device operation is controlled by instructions from the
host processor. The list of instructions and their associated
opcodes are contained in Tables 1 and 2. A valid instruc-
tion starts with the falling edge of CS followed by the appro-
priate 8-bit opcode and the desired buffer or main memory
address location. While the CS pin is low, toggling the SCK
pin controls the loading of the opcode and the desired
buffer or main memory address location through the SI
(serial input) pin. All instructions, addresses, and data are
transferred with the most significant bit (MSB) first.
Read
By specifying the appropriate opcode, data can be read
from the main memory or from either one of the two data
buffers.
MAIN MEMORY PAGE READ: A main memory read allows
the user to read data directly from any one of the 4096
pages in the main memory, bypassing both of the data buff-
ers and leaving the contents of the buffers unchanged. To
start a page read, the 8-bit opcode, 52H, is followed by 24
address bits and 32 don’t care bits. In the AT45D081, the
first three address bits are reserved for larger density
devices (see Notes on page 7), the next 12 address bits
(PA11-PA0) specify the page address, and the next nine
address bits (BA8-BA0) specify the starting byte address
within the page. The 32 don’t care bits which follow the 24
address bits are sent to initialize the read operation. Fol-
lowing the 32 don’t care bits, additional pulses on SCK
result in serial data being output on the SO (serial output)
pin. The CS pin must remain low during the loading of the
opcode, the address bits, and the reading of data. When
the end of a page in main memory is reached during a main
memory page read, the device will continue reading at the
beginning of the same page. A low to high transition on the
CS pin will terminate the read operation and tri-state the
SO pin.
BUFFER READ: Data can be read from either one of the
two buffers, using different opcodes to specify which buffer
to read from. An opcode of 54H is used to read data from
buffer 1, and an opcode of 56H is used to read data from
2 AT45D081
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관련 데이터시트
AT45D081-RC
8-Megabit 5-volt Only Serial DataFlash - ATMEL Corporation
AT45D081-RI
8-Megabit 5-volt Only Serial DataFlash - ATMEL Corporation