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OKI |
OKI Semiconductor
MR27V12850J
P2ROM8M–Word × 16–Bit or 16M–Word × 8–Bit Page mode
FEDR27V12850J-02-03
Issue Date: Jul. 9, 2004
FEATURES
·8,388,608-word × 16-bit/16,777,216-word × 8-bit electrically
switchable configuration
· Page size of 8-word x 16-Bit or 16-word x 8-Bit
· 3.0 V to 3.6 V power supply
· Access time
100 ns MAX
· Page Access time
25 ns MAX
· Operating current
50 mA MAX(5MHz)
· Standby current
10 µA MAX
· Input/Output TTL compatible
· Three-state output
PACKAGES
· MR27V12850J-xxxTN
48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K)
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive Oki technology utilizes factory test equipment for
programming the customers code into the P2ROM prior to final
production testing. Advancements in this technology allows
production costs to be equivalent to MASKROM and has many
advantages and added benefits over the other non-volatile
technologies, which include the following;
· Short lead time, since the P2ROM is programmed at the
final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged
products are maintained to provide an aggressive lead-time
and minimize liability as a custom product.
· No mask charge, since P2ROMs do not utilize a custom
mask for storing customer code, no mask charges apply.
· No additional programming charge, unlike Flash and
OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the
factory with minimal effect on the production throughput.
The cost is included in the unit price.
· Custom Marking is available at no additional charge.
· Pin Compatible with Mask ROM
PIN CONFIGURATION (TOP VIEW)
BYTE# 1
A16 2
A15 3
A14 4
A13 5
A12 6
A11 7
A10 8
A9 9
A8 10
A19 11
A21 12
A20 13
A18 14
A17 15
A7 16
A6 17
A5 18
A4 19
A3 20
A2 21
A1 22
A0 23
CE# 24
48 Vss
47 Vss
46 D15/A–1
45 D7
44 D14
43 D6
42 D13
41 D5
40 D12
39 D4
38 VCC
37 VCC
36 A22
35 D11
34 D3
33 D10
32 D2
31 D9
30 D1
29 D8
28 D0
27 OE #
26 Vss
25 Vss
48TSOP(Type-I)
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OKI Semiconductor
FEDR27V12850J-02-03
MR27V12850J / P2ROM
BLOCK DIAGRAM
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A22
D0 to D14
CE#
OE#
BYTE#
VCC
VSS
A–1
× 8/× 16 Switch
CE#
OE#
BYTE#
CE OE
Memory Cell Matrix
8M × 16-Bit or 16M × 8-Bit
Multiplexer
Output Buffer
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
Functions
Data output / Address input
Address inputs
Data outputs
Chip enable input
Output enable input
Word / Byte select input
Power supply voltage
Ground
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