MR26V51252R 반도체 회로 부품 판매점
P2ROM
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 LAPIS |
MR26V51252R
P2ROM32M–Word 16–Bit or 64M–Word 8–Bit Page Mode
FEDR26V51252R-002-02
Issue Date: Oct. 01, 2008
FEATURES
32Mx16 or 64Mx8-bit
electrically switchable configuration
· Page size of 8-word x 16-Bit or 16-word x 8-Bit
· 3.0 V to 3.6 V power supply
·Random Access time
105 ns MAX
·Page Access time
25 ns MAX
· Operating current
50 mA MAX
· Standby current
4 mA MAX
· Input/Output TTL compatible
· Three-state output
PACKAGES
· MR26V51252R-xxxTA
56-pin plastic TSOP (P-TSOP(1)56-1420-0.50-K-MC)
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive LAPIS Semiconductor technology utilizes factory
test equipment for programming the customers code into the
P2ROM prior to final production testing. Advancements in this
technology allows production costs to be equivalent to
MASKROM and has many advantages and added benefits over
the other non-volatile technologies, which include the
following;
PIN CONFIGURATION (TOP VIEW)
A23
A22
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
NC
NC
A21
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
TSOP
(type1)
56 A24
55 NC
54 A16
53 BYTE#
52 Vss
51 D15/A-1
50 D7
49 D14
48 D6
47 D13
46 D5
45 D12
44 D4
43 Vcc
42 D11
41 D3
40 D10
39 D2
38 D9
37 D1
36 D8
35 D0
34 OE#
33 Vss
32 CE#
31 A0
30 NC
29 Vcc
· Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive
lead-time and minimize liability as a custom product.
· No mask charge, since P2ROMs do not utilize a custom mask for storing customer code, no mask charges
apply.
· No additional programming charge, unlike Flash and OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput.
The cost is included in the unit price.
· Custom Marking is available at no additional charge.
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FEDR26V51252R-002-02
MR26V51252R / P2ROM
BLOCK DIAGRAM
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A24
D0 to D14
CE#
OE#
BYTE#
VCC
VSS
NC
A-1
× 8/× 16 Switch
CE#
OE#
BYTE#
CE OE
Memory Cell Matrix
32M × 16-Bit or 64M × 8-Bit
Multiplexer & Sense Amp.
Output Buffer
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
Functions
Data output / Address input
Address inputs
Data outputs
Chip enable input
Output enable input
Word / Byte select input
Power supply voltage
Ground
No connect
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제조업체: LAPIS
( lapis )
MR26V51252R data
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[ MR26V51252R.PDF ]
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국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
[ 홈페이지 ]
IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈
( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )
전력반도체 문의 : 010-3582-2743
