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MR26T51203L 반도체 회로 부품 판매점

P2ROM



LAPIS 로고
LAPIS
MR26T51203L 데이터시트, 핀배열, 회로
MR26T51203L
P2ROM32M–Word × 16–Bit or 64M–Word × 8–Bit
FEDR26T51203L-002-02
Issue Date: Oct. 01, 2008
FEATURES
· 33,554,432-word × 16-bit/67,108,864-word × 8-bit
electrically switchable configuration
· Access time
2.7 V to 3.6 V power supply.........120 ns MAX
3.0 V to 3.6 V power supply.........100 ns MAX
· Operating current ..........................35 mA MAX(5MHz)
· Standby current .............................10 µA MAX
· Input/Output TTL compatible
· Three-state output
PACKAGES
· MR26T51203L-xxxTM
50-pin plastic TSOP (P-TSOP(2)50- 400-0.80-K-MC)
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive LAPIS Semiconductor technology utilizes factory
test equipment for programming the customers code into the
P2ROM prior to final production testing.
Advancements in this technology allows production costs to be
equivalent to MASKROM and has many advantages and added
benefits over the other non-volatile technologies, which
include the following;
PIN CONFIGURATION (TOP VIEW)
A11 1
A10 2
A9 3
A8 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A23 12
GND 13
BYTE# 14
A0 15
D0 16
D8 17
D1 18
D9 19
Vcc 20
D2 21
D10 22
D3 23
D11 24
GND 25
50TSOP
(Type2)
50 CE#
49 A12
48 A13
47 A14
46 A15
45 Vcc
44 A16
43 A17
42 A18
41 A19
40 A20
39 A21
38 GND
37 A22
36 A24
35 OE#
34 D15/A-1
33 D7
32 D14
31 D6
30 D13
29 D5
28 D12
27 D4
26 Vcc
· Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive
lead-time and minimize liability as a custom product.
· No mask charge, since P2ROMs do not utilize a custom mask for storing customer code, no mask charges
apply.
· No additional programming charge, unlike Flash and OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput.
The cost is included in the unit price.
· Custom Marking is available at no additional charge.
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MR26T51203L 데이터시트, 핀배열, 회로
BLOCK DIAGRAM
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
FEDR26T51203L-002-02
MR26T51203L / P2ROM
A–1
× 8/× 16 Switch
CE# OE# BYTE#
CE OE
Memory Cell Matrix
32M × 16-Bit or 64M × 8-Bit
Multiplexer
Output Buffer
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A24
D0 to D14
CE#
OE#
BYTE#
VCC
VSS
Functions
Data output / Address input
Address inputs
Data outputs
Chip enable input
Output enable input
Word / Byte select input
Power supply voltage
Ground
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MR26T51203L

P2ROM - LAPIS



MR26T51203L

32M-Word x 16-Bit or64M-Word x 8-Bit P2ROM - OKI electronic componets