IS43LR32100C 판매점 - 512K x 32Bits x 2Banks Mobile DDR SDRAM

IS43LR32100C

IS46LR32100C

512K x 32Bits x 2Banks Mobile DDR SDRAM

Description

The IS43/46LR32100C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32

bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully

synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 2n-bits prefetched

to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS.

Features

• JEDEC standard 1.8V power supply

• Two internal banks for concurrent operation

• MRS cycle with address key programs

- CAS latency 2, 3 (clock)

- Burst length (2, 4, 8, 16)

- Burst type (sequential & interleave)

• Fully differential clock inputs (CK, /CK)

• All inputs except data & DM are sampled at the rising

edge of the system clock

• Data I/O transaction on both edges of data strobe

• Bidirectional data strobe per byte of data (DQS)

• DM for write masking only

• Edge aligned data & data strobe output

• Center aligned data & data strobe input

• 64ms refresh period (4K cycle)

• Auto & self refresh

• Concurrent Auto Precharge

• Maximum clock frequency up to 166MHz

• Maximum data rate up to 333Mbps/pin

• Power Saving support

- PASR (Partial Array Self Refresh)

- Auto TCSR (Temperature Compensated Self Refresh)

- Deep Power Down Mode

- Programmable Driver Strength Control by Full Strength

or 1/2, 1/4, 1/8 of Full Strength

• LVCMOS compatible inputs/outputs

products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services

described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information

and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or

malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or

effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to

its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Rev. A | August 2014

www.issi.com - [email protected]

Figure1: 90Ball FBGA Ball Assignment

IS43/46LR32100C

456

A VSS DQ31 VSSQ

B VDDQ DQ29 DQ30

C VSSQ DQ27

D VDDQ DQ25

DQ28

DQ26

E VSSQ DQS3 DQ24

F VDD DM3

G CKE CLK /CLK

H A9 NC NC

J A6 A7 A8

K A4

DM1

L VSSQ DQS1 DQ8

M VDDQ DQ9

N VSSQ DQ11

DQ10

DQ12

P VDDQ DQ13 DQ14

R VSS DQ15 VSSQ

VDDQ DQ16 VDD

DQ17 DQ18 VSSQ

DQ19 DQ20 VDDQ

DQ21 DQ22 VSSQ

DQ23 DQS2 VDDQ

NC DM2 VSS

/WE /CAS /RAS

/CS BA

A10 A0

A2 DM0 A3

DQ7 DQS0 VDDQ

DQ5 DQ6 VSSQ

DQ3 DQ4 VDDQ

DQ1 DQ2 VSSQ

VDDQ DQ0 VDD

[Top View]

Rev. A | August 2014

IS43LR32100C 반도체 회로 부품 판매점

512K x 32Bits x 2Banks Mobile DDR SDRAM

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