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NT5CC128M8DN 반도체 회로 부품 판매점

1Gb DDR3 SDRAM



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Nanya
NT5CC128M8DN 데이터시트, 핀배열, 회로
1Gb DDR3 SDRAM
NT5CB128M8DN / NT5CB64M16DP
NT5CC128M8DN / NT5CC64M16DP
Feature
1.5V ± 0.075V & 1.35V -0.067/+0.1V
(JEDEC Standard Power Supply)
VDD= VDDQ= 1.35V (1.283~1.45V )
Backward compatible to VDD= VDDQ= 1.5V
±0.075V
Supports DDR3L devices to be backward
compatible in 1.5V applications
The timing specification of high speed bin is
backward compatible with low speed bin
8 Internal memory banks (BA0- BA2)
Differential clock input (CK, )
Programmable Latency: 5, 6, 7, 8, 9,
10, 11, 12, 13, (14)
POSTED CAS ADDITIVE Programmable Additive
Latency: 0, CL-1, CL-2
Programmable Sequential / Interleave Burst Type
Programmable Burst Length: 4, 8
8n-bit prefetch architecture
Output Driver Impedance Control
Differential bidirectional data strobe
Write Leveling
OCD Calibration
Dynamic ODT (Rtt_Nom & Rtt_WR)
Auto Self-Refresh
Self-Refresh Temperature
RoHS Compliance
Lead-Free and Halogen-Free
Packages:
78-Ball BGA for x8 components
96-Ball BGA for x16 components
Operation Temperture
Commerical grade (0℃≦TC95)
- BE, CF, DH, EJ, FK
Industial grade (-40℃≦TC95)
- CFI, DHI
DCC Version 1.1
01/ 2014
1
© NANYA TECHNOLOGY CORP.
All rights reserved
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.


NT5CC128M8DN 데이터시트, 핀배열, 회로
1Gb DDR3 SDRAM
NT5CB128M8DN / NT5CB64M16DP
NT5CC128M8DN / NT5CC64M16DP
Table 1: CAS Latency Frequency
-BE*
-CF/CFI*
Speed Bins
DDR3/L-1066
DDR3/L-1333
CL7 CL8
Parameter
Clock
Frequency
Min.
300
Max.
Min. Max.
533 300 667
tRCD
13.125
-
12 -
tRP
13.125
-
12 -
tRC
50.625
-
48 -
tRAS
37.5 70K 36 70K
tCK(Avg.)@CL5
3
3.3 2.5 3.3
tCK(Avg.)@CL6
2.5
3.3 2.5 3.3
tCK(Avg.)@CL7 1.875
2.5 1.875 2.5
tCK(Avg.)@CL8 1.875
2.5
1.5 2.5
tCK(Avg.)@CL9
tCK(Avg.)@CL10
-
-
- 1.5 1.875
- 1.5 1.875
tCK(Avg.)@CL11
-
- --
tCK(Avg.)@CL12
-
- --
tCK(Avg.)@CL13
tCK(Avg.)@CL14
-
- --
-DH/DHI*
DDR3/L-1600
CL10
Min.
Max.
300 800
12.5
12.5
47.5
35
2.5
2.5
1.875
1.5
1.5
1.25
1.25
-
-
-
-
-
70K
3.3
3.3
2.5
2.5
1.875
1.875
1.5
-
-
-EJ*
DDR3-1866
CL12
Min. Max.
-FK*
DDR3-2133
CL13
Units
Min. Max. tCK(Avg.)
300 933 300 1066
MHz
12.84
- 12.155 -
12.84
- 12.155 -
46.84
34
2.5
- 45.155 -
70K 33 70K
3.3 2.5 3.3
2.5 3.3 2.5 3.3
1.875 2.5 1.875 2.5
1.875 2.5 1.875 2.5
1.5 1.875 1.5 1.875
1.5 1.875 1.25 1.875
1.25 1.5 1.25 1.5
1.07
1.25
1.07
1.25
1.07
1.25
0.938
0.938
1.25
1.07
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*The timing specification of high speed bin is backward compatible with low speed bin
DCC Version 1.1
01 / 2014
2
© NANYA TECHNOLOGY CORP.
All rights reserved
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.




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