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Arctic Silicon Devices |
Preliminary Product Specification
ASD5020 High Speed Mode
Multi-Mode 12-bit 640 MSPS / 8-bit 1000 MSPS Analog to Digital Converter
Features
● 12-bit Modes
● Single Channel Mode: FSmax = 640 MSPS
● Dual Channel Mode: FSmax = 320 MSPS
● Quad Channel Mode: FSmax = 160 MSPS
● SNR: 71 dB, SFDR: 65 dB
● 8-bit Modes
● Single Channel Mode: FSmax = 1000 MSPS
● Dual Channel Mode: FSmax = 500 MSPS
● Quad Channel Mode: FSmax = 250 MSPS
● SNR: 49 dB, SFDR: 65 dB
● Integrated Cross Point Switches with instantaneous
switching
● Internal low jitter programmable Clock Divider
● Ultra Low Power Dissipation
● 490mW including I/O at 640 MSPS
● 0.5 µs start-up time from Sleep, 15 µs from Power
Down
● Internal reference circuitry with no external
components required
● Coarse and fine gain control
● Digital fine gain adjustment for each ADC
● Internal offset correction
● 1.8 V supply voltage
● 1.7 - 3.6 V CMOS logic on control interface pins
● Serial LVDS/RSDS output
● 12, 14, 16 and Dual 8-bit modes available
● 7mm x 7mm 48 QFN Package
Description
The ASD5020 is a versatile high performance low power
analog-to-digital converter (ADC), utilizing time-interleaving
to increase sampling rate. Integrated Cross Point Switches
activate the input selected by the user.
In single channel mode, one of the four inputs can be
selected as valid input to the single ADC channel. In dual
channel mode, any two of the four inputs can be selected to
each ADC channel. In quad channel mode, any input can be
assigned to any ADC channel.
An internal, low jitter and programmable clock divider makes
it possible to use a single clock source for all operational
modes.
The ASD5020 is based on a proprietary structure, and
employs internal reference circuitry, a serial control interface
and a serial LVDS output data. Data and frame
synchronization clocks are supplied for data capture at the
receiver. Internal digital fine gain can be set separately for
each ADC to calibrate for gain errors.
Various modes and configuration settings can be applied to
the ADC through the serial control interface (SPI). Each
channel can be powered down independently and output
data format can be selected through this interface. A full chip
idle mode can be set by a single external pin. Register
settings determine the exact function of this pin.
ASD5020 is designed to interface easily with Field
Programmable Gate Arrays (FPGAs) from several vendors.
Applications
● Precision Oscilloscopes
● Diversity Receivers
● Hi-End Ultrasound
● Communication Testing
● Non Destructive Testing
Serial control
interface
Clock
Divide
1/2/4/8
Interleave
PLL
LVDS
FCLKP
FCLKN
LCLKP
LCLKN
IP1 ADC 1
IN1
Digital
gain
LVDS
DP1A
DN1A
DP1B
DN1B
IP2 ADC 2
IN2
IP3
ADC 3
IN3
Digital
gain
Digital
gain
LVDS
LVDS
DP2A
DN2A
DP2B
DN2B
DP3A
DN3A
DP3B
DN3B
IP4 ADC 4
IN4
Digital
gain
LVDS
DP4A
DN4A
DP4B
DN4B
Figure 1: Functional Block Diagram
Vestre Rosten 81, 7075 Tiller, Norway
Phone: +47 73 10 29 00, Fax: +47 73 10 29 19
Page 1 of 34
Org. No: NO 991 265 163MVA
www.arcticsilicon.com
Preliminary Product Specification
Table of Contents
Blizzard Product family: Products and Relations..................................................................................................................3
Specifications........................................................................................................................................................................ 4
ASD5020 High Speed Mode........................................................................................................................................... 5
Digital and Switching Specifications...................................................................................................................................... 6
Absolute Maximum Ratings.................................................................................................................................................. 7
Pin Configuration and Description......................................................................................................................................... 8
Startup Initialization............................................................................................................................................................. 10
Serial Interface.................................................................................................................................................................... 10
Timing Diagram............................................................................................................................................................. 10
Timing Diagrams................................................................................................................................................................. 11
Register Map....................................................................................................................................................................... 13
Register Description ........................................................................................................................................................... 15
Software Reset.............................................................................................................................................................. 15
Modes of Operation ...................................................................................................................................................... 15
Input Select.................................................................................................................................................................... 16
Full-scale Control .......................................................................................................................................................... 17
Current Control.............................................................................................................................................................. 17
Start-up and Clock Jitter Control................................................................................................................................... 19
LVDS Output Configuration and Control........................................................................................................................21
LVDS Drive Strength Programmability.......................................................................................................................... 24
LVDS Internal Termination Programmability..................................................................................................................24
Power Mode Control ..................................................................................................................................................... 26
Programmable Gain...................................................................................................................................................... 27
Analog Input Invert........................................................................................................................................................ 29
LVDS Test Patterns........................................................................................................................................................ 29
Theory of Operation............................................................................................................................................................ 30
Interleaving Effects and Sampling Order....................................................................................................................... 30
Recommended Usage........................................................................................................................................................ 30
Analog Input.................................................................................................................................................................. 30
DC-Coupling............................................................................................................................................................ 31
AC-Coupling............................................................................................................................................................. 31
Clock Input and Jitter Considerations............................................................................................................................ 31
Application Usage Example................................................................................................................................................ 32
Start-up Initialization...................................................................................................................................................... 32
Change Mode................................................................................................................................................................ 32
Select Analog Input........................................................................................................................................................ 32
Package Mechanical Data.................................................................................................................................................. 33
QFN48........................................................................................................................................................................... 33
Product Information............................................................................................................................................................. 34
Ordering information........................................................................................................................................................... 34
Datasheet status................................................................................................................................................................. 34
Objective Product Specification:.................................................................................................................................... 34
Preliminary Product Specification:................................................................................................................................. 34
Product Specification:.................................................................................................................................................... 34
Life Support Applications :....................................................................................................................................... 34
ASD5020
rev 2.0, 2010.11.08
Page 2 of 34
High Speed Mode
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