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National Semiconductor |
December 2004
www.DataSheet4U.com
LM5025A
Active Clamp Voltage Mode PWM Controller
General Description
The LM5025A is a functional variant of the LM5025 active
clamp PWM controller. The functional differences of the
LM5025A are: The CS1 and CS2 current limit thresholds
have been increased to 0.5V. The internal CS2 filter dis-
charge device has been disabled and no longer operates
each clock cycle. The internal VCC and VREF regulators
continue to operate when the line UVLO pin is below thresh-
old.
The LM5025A PWM controller contains all of the features
necessary to implement power converters utilizing the Active
Clamp / Reset technique. With the active clamp technique,
higher efficiencies and greater power densities can be real-
ized compared to conventional catch winding or RDC clamp
/ reset techniques. Two control outputs are provided, the
main power switch control (OUT_A) and the active clamp
switch control (OUT_B). The two internal compound gate
drivers parallel both MOS and Bipolar devices, providing
superior gate drive characteristics. This controller is de-
signed for high-speed operation including an oscillator fre-
quency range up to 1MHz and total PWM and current sense
propagation delays less than 100ns. The LM5025A includes
a high-voltage start-up regulator that operates over a wide
input range of 13V to 90V. Additional features include: Line
Under Voltage Lockout (UVLO), softstart, oscillator UP/
DOWN sync capability, precision reference and thermal
shutdown.
Features
n Internal Start-up Bias Regulator
n 3A Compound Main Gate Driver
n Programmable Line Under-Voltage Lockout (UVLO) with
Adjustable Hysteresis
n Voltage Mode Control with Feed-Forward
n Adjustable Dual Mode Over-Current Protection
n Programmable Overlap or Deadtime between the Main
and Active Clamp Outputs
n Volt x Second Clamp
n Programmable Soft-start
n Leading Edge Blanking
n Single Resistor Programmable Oscillator
n Oscillator UP / DOWN Sync Capability
n Precision 5V Reference
n Thermal Shutdown
Packages
n TSSOP-16
n LLP-16 (5x5 mm) Thermally Enhanced
Typical Application Circuit
Simplified Active Clamp Forward Power Converter
20107401
© 2004 National Semiconductor Corporation DS201074
www.national.com
Connection Diagram
www.DataSheet4U.com
20107416
16-Lead TSSOP, LLP
Ordering Information
Order Number
LM5025AMTC
LM5025AMTCX
LM5025ASD
LM5025ASDX
Package Type
TSSOP-16
TSSOP-16
LLP-16
LLP-16
NSC Package Drawing
MTC-16
MTC-16
SDA-16A
SDA-16A
Supplied As
92 Units per anti-static tube
2500 Units on Tape and Reel
Available Soon
Available Soon
Pin Description
PIN NAME
DESCRIPTION
APPLICATION INFORMATION
1 VIN Source Input Voltage
Input to start-up regulator. Input range 13V to 90V,
with transient capability to 105V.
2 RAMP Modulator ramp signal
An external RC circuit from Vin sets the ramp slope.
This pin is discharged at the conclusion of every
cycle by an internal FET, initiated by either the
internal clock or the V*Sec Clamp comparator.
3
CS1
Current sense input for cycle-by-cycle limiting If CS1 exceeds 0.5V the outputs will go into
Cycle-by-Cycle current limit. CS1 is held low for
50ns after OUT_A switches high providing leading
edge blanking.
4
CS2
Current sense input for soft restart
If CS2 exceeds 0.5V the outputs will be disabled and
a softstart commenced. The soft-start capacitor will
be fully discharged and then released with a pull-up
current of 1µA. After the first output pulse (when SS
=1V), the SS charge current will revert back to 20µA.
5
TIME
Output overlap/Deadtime control
An external resistor (RSET) sets either the overlap
time or dead time for the active clamp output. An
RSET resistor connected between TIME and GND
produces in-phase OUT_A and OUT_B pulses with
overlap. An RSET resistor connected between TIME
and REF produces out-of-phase OUT_A and OUT_B
pulses with deadtime.
6
REF
Precision 5 volt reference output
Maximum output current: 10mA Locally decouple
with a 0.1µF capacitor. Reference stays low until the
VCC UV comparator is satisfied.
7 VCC Output from the internal high voltage start-up If an auxiliary winding raises the voltage on this pin
regulator. The VCC voltage is regulated to above the regulation setpoint, the internal start-up
7.6V.
regulator will shutdown, reducing the IC power
dissipation.
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