UC3864 반도체 회로 부품 판매점
(UC3861 - 3868) Resonant-Mode Power Supply Controllers
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 Unitrode |
www.DataSheet4U.com
Resonant-Mode Power Supply Controllers
UC1861-1868
UC2861-2868
UC3861-3868
FEATURES
DESCRIPTION
• Controls Zero Current Switched (ZCS)
or Zero Voltage Switched (ZVS)
Quasi-Resonant Converters
• Zero-Crossing Terminated One-Shot
Timer
• Precision 1%, Soft-Started 5V
Reference
• Programmable Restart Delay
Following Fault
• Voltage-Controlled Oscillator (VCO)
with Programmable Minimum and
Maximum Frequencies from 10kHz to
1MHz
• Low Start-Up Current (150µA typical)
• Dual 1 Amp Peak FET Drivers
• UVLO Option for Off-Line or DC/DC
Applications
The UC1861-1868 family of ICs is optimized for the control of Zero Cur-
rent Switched and Zero Voltage Switched quasi-resonant converters. Dif-
ferences between members of this device family result from the various
combinations of UVLO thresholds and output options. Additionally, the
one-shot pulse steering logic is configured to program either on-time for
ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861-
1864).
The primary control blocks implemented include an error amplifier to com-
pensate the overall system loop and to drive a voltage controlled oscillator
(VCO), featuring programmable minimum and maximum frequencies. Trig-
gered by the VCO, the one-shot generates pulses of a programmed maxi-
mum width, which can be modulated by the Zero Detection comparator.
This circuit facilitates “true” zero current or voltage switching over various
line, load, and temperature changes, and is also able to accommodate the
resonant components' initial tolerances.
Under-Voltage Lockout is incorporated to facilitate safe starts upon
power-up. The supply current during the under-voltage lockout period is
typically less than 150µA, and the outputs are actively forced to the low
state.
(continued)
Device
UVLO
Outputs
“Fixed”
1861
16.5/10.5
Alternating
Off Time
BLOCK DIAGRAM
1862
16.5/10.5
Parallel
Off Time
1863
36014
Alternating
Off Time
1864
36014
Parallel
Off Time
1865
16.5/10.5
Alternating
On Time
1866
16.5/10.5
Parallel
On Time
1867
36014
Alternating
On Time
1868
36014
Parallel
On Time
Pin numbers refer to the J and N packages.
10/98
UDG-92018
DESCRIPTION (cont.)
UVLO thresholds for the UC1861/62/65/66 are 16.5V
(ON) and 10.5V (OFF), whereas the UC1863/64/67/68
thresholds are 8V (ON) and 7V (OFF). After VCC ex-
ceeds the UVLO threshold, a 5V generator is enabled
which provides bias for the internal circuits and up to
10mA for external usage.
A Fault comparator serves to detect fault conditions and
set a latch while forcing the output drivers low. The Soft-
Ref pin serves three functions: providing soft start, re-
UC1861-1868
UC2861-2868
UC3861-3868
start delay, and the internal system reference.
Each device features dual 1 Amp peak totem pole output
drivers for direct interface to power MOSFETS. The out-
puts are programmed to alternate in the
UC1861/63/65/67 devices. The UC1862/64/66/68 out-
puts operate in unison alllowing a 2 Amp peak current.
ABSOLUTE MAXIMUM RATINGS
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22V
Output Current
Source or Sink (Pins 11 & 14) . . . . . . . . . . . . . . . . . . . . . 0.5A
DC Pulse (0.5µs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5A
Power Ground Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.2V
Inputs (Pins 2, 3, 10, & 15) . . . . . . . . . . . . . . . . . . . . –0.4 to 7V
Error Amp Output Current . . . . . . . . . . . . . . . . . . . . . . . . ±2mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
Junction Temperature (Operating). . . . . . . . . . . . . . . . . . 150°C
Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . 300°C
All voltages are with respect to signal ground and all currents
are positive into the specified terminal. Pin numbers refer to
the J and N packages. Consult Unitrode Integrated Circuits da-
tabook for information regarding thermal specifications and
limitations of packages.
DIL-16, SOIC-16 (Top View)
J or N, DW Packages
CONNNECTION DIAGRAMS
PLCC-20 & LCC-20 (Top View)
Q & L Package
PACKAGE PIN FUNCTION
FUNCTION
PIN
Soft Ref
1
5V 2
NI 3
INV 4
E/A Out
5
Sig Gnd
6
Range
7
RMIN
8
CVCO
9
RC 10
Zero
11
NC 12
NC 13
A Out
14
Pwr Gnd
15
Pwr Gnd
16
VCC
17
B Out
18
2
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