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ML4821 반도체 회로 부품 판매점

Power Factor Controller



Micro Linear 로고
Micro Linear
ML4821 데이터시트, 핀배열, 회로
Micro Linear
GENERAL DESCRIPTION
The ML4821 provides complete control for a “boost” type
power factor correction system using the average current
sensing method. Special care has been taken in the design
of the ML4821 to increase system noise immunity. The
circuit includes a precision reference, gain modulator,
average current error amplifier, output error amplifier,
over-voltage protection comparator, shutdown logic, as
well as a high current output. In addition, start-up is
simplified by an under-voltage lockout circuit.
In a typical application, the ML4821 controls the AC input
current by adjusting the pulse width of the output
MOSFET. This modulates the line current so that its shape
conforms to the shape of the input voltage. The reference
for the current regulator is a product of the sinusoidal line
voltage times the output of the error amplifier which is
regulating the output DC voltage. Average line voltage
compensation is provided in the gain modulator to ensure
constant loop gain over a wide input voltage range. This
compensation includes a special “brown-out” control
which reduces output power below 90V RMS input.
BLOCK DIAGRAM
May 1997
ML4821*
Power Factor Controller
FEATURES
s Average current sensing for lowest possible
harmonic distortion
s Average line compensation with brown-out control
s Precision buffered 5V reference
s 1A peak current totem-pole output drive
s Overvoltage comparator eliminates output “runaway”
due to load removal
s Wide common mode range in current sense
comparators for better noise immunity
s Large oscillator amplitude for better noise immunity
s Output driver internally limited to 17V
s “Sleep mode” shutdown input
* Some Packages Are Obsolete
OVP
11
ILIM
1
2 IA OUT
IA–
3
IA+
4
+
+
VREF
+
+
0.7V
+
SLEEP
UNDER
VOLTAGE
LOCKOUT
R
SQ
VLIMIT
17V
ISINE
5
VRMS
8
OUT
GAIN
MODULATOR
EA OUT
6
EA–
7
VREF
+
9 SOFT START
VREF
OSC
Micro Linear
VREF 16
GND 18
VCC 15
OUT
14
PGND
13
RT 12
SYNC
10
CT 17
1


ML4821 데이터시트, 핀배열, 회로
ML4821
PIN CONNECTION
ML4821
18-Pin DIP (P18)
ILIM
IA OUT
IA–
IA+
ISINE
EA OUT
EA–
VRMS
SOFT START
1
2
3
4
5
6
7
8
9
18 GND
17 CT
16 VREF
15 VCC
14 OUT
13 PGND
12 RT
11 OVP
10 SYNC
TOP VIEW
ILIM
IA OUT
IA–
IA+
ISINE
EA OUT
EA–
VRMS
SOFT START
N/C
ML4821
20-Pin SOIC (S20)
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
TOP VIEW
GND
CT
VREF
VCC
OUT
PGND
RT
OVP
SYNC
N/C
PIN DESCRIPTION (Pin numbers in parentheses are for 20-pin packages)
PIN NAME FUNCTION
1 (1)
2 (2)
3 (3)
4 (4)
5 (5)
ILIM Peak cycle-by-cycle current limit input
IA OUT Output and compensation node of the
average current error amplifier
IA– Inverting input of the average current
error amplifier
IA+ Non-Inverting input of the average
current error amplifier and output of
the gain modulator
ISINE Gain modulator input
6 (6)
7 (7)
8 (8)
9 (9)
EA OUT Output of output voltage error
amplifier
INV Inverting input to error amplifier
VRMS
Input for average line voltage
compensation
SOFT Normally connected to soft start
START capacitor
PIN NAME
10 (12) SYNC
11 (13) OVP
12 (14) RT
13 (15) PWR
GND
14 (16) OUT
15 (17) VCC
16 (18) VREF
17 (19) CT
18 (20) GND
FUNCTION
Oscillator synchronization input
Inhibits output pulses when the
voltage at this pin exceeds 5V. Also,
when the voltage at this pin is less
than 0.7V, the IC goes into low current
shut-down mode.
Timing resistor for the oscillator
Return for the high current totem
pole output
High current totem pole output
Positive supply for the IC
Buffered output for the 5V voltage
reference
Timing capacitor for the oscillator.
Analog signal ground
2 Micro Linear




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ML4821 controller

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