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Fairchild |
January 2001
PRELIMINARY
ML4803
8-Pin PFC and PWM Controller Combo
GENERAL DESCRIPTION
The ML4803 is a space-saving controller for power factor
corrected, switched mode power supplies that offers very
low start-up and operating currents.
Power Factor Correction (PFC) offers the use of smaller,
lower cost bulk capacitors, reduces power line loading
and stress on the switching FETs, and results in a power
supply fully compliant to IEC1000-3-2 specifications. The
ML4803 includes circuits for the implementation of a
leading edge, average current “boost” type PFC and a
trailing edge, PWM.
The ML4803-1’s PFC and PWM operate at the same
frequency, 67kHz. The PFC frequency of the ML4803-2 is
automatically set at half that of the 134kHz PWM. This
higher frequency allows the user to design with smaller
PWM components while maintaining the optimum
operating frequency for the PFC. An overvoltage
comparator shuts down the PFC section in the event of a
sudden decrease in load. The PFC section also includes
peak current limiting for enhanced system reliability.
FEATURES
s Internally synchronized PFC and PWM in one 8-pin IC
s Patented one-pin voltage error amplifier with advanced
input current shaping technique
s Peak or average current, continuous boost, leading
edge PFC (Input Current Shaping Technology)
s High efficiency trailing-edge current mode PWM
s Low supply currents; start-up: 150µA typ., operating:
2mA typ.
s Synchronized leading and trailing edge modulation
s Reduces ripple current in the storage capacitor
between the PFC and PWM sections
s Overvoltage, UVLO, and brownout protection
s PFC VCCOVP with PFC Soft Start
BLOCK DIAGRAM
VEAO
4
7V
35µA
+ PFC OFF
COMP
–
–1
M1 M2
M7
M3
R1
7
VCC
17.5V
16.2V
C1
30pF
M4
ISENSE
3
–1V
ONE PIN ERROR AMPLIFIER
+ PFC ILIMIT
– VCC
–4
PFC/PWM UVLO
+
COMP
–
VREF
26k
VDC
5
40k
ILIMIT
6
1.2V
OSCILLATOR
PFC – 67kHz
PWM – 134kHz
DUTY CYCLE
LIMIT
– PWM COMPARATOR
COMP
+
–
COMP
+
M6
1.5V
– DC ILIMIT
+
+ VCC OVP
COMP
–
REF VREF
GND
2
PFC
CONTROL
LOGIC
SOFT START
PFC OUT
1
LEADING
EDGE PFC
TRAILING
EDGE PWM
PWM
CONTROL
LOGIC
PWM OUT
8
REV. 1.1 1/24/2001
ML4803
PIN CONFIGURATION
PFC OUT
GND
ISENSE
VEAO
ML4803
8-Pin PDIP (P08)
8-Pin SOIC (S08)
18
27
36
45
TOP VIEW
PWM OUT
VCC
ILIMIT
VDC
PIN DESCRIPTION
PIN NAME
FUNCTION
1 PFC OUT PFC driver output
2 GND
Ground
3 ISENSE
Current sense input to the PFC current
limit comparator
4 VEAO
PFC one-pin error amplifier input
PIN NAME
FUNCTION
5 VDC
6 ILIMIT
7 VCC
PWM voltage feedback input
PWM current limit comparator input
Positive supply (may require an
external shunt regulator)
8 PWM OUT PWM driver output
2 REV. 1.1 1/24/2001
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