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MX28F2000T 반도체 회로 부품 판매점

2M-BIT [256K x 8] CMOS FLASH MEMORY



Macronix International 로고
Macronix International
MX28F2000T 데이터시트, 핀배열, 회로
FEATURES
• 262,144 bytes by 8-bit organization
• Fast access time: 90/120 ns
• Low power consumption
– 50mA maximum active current
– 100uA maximum standby current
• Programming and erasing voltage 12V ± 5%
• Command register architecture
– Byte Programming (15us typical)
– Auto chip erase 5 seconds typical
(including preprogramming time)
– Block Erase
• Optimized high density blocked architecture
– Eight 4-KB blocks
– Fourteen 16-KB blocks
MX28F2000T
2M-BIT [256K x 8] CMOS FLASH MEMORY
• Auto Erase (chip & block) and Auto Program
– DATA polling
– Toggle bit
• 10,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1 to VCC+1V
• Advanced CMOS Flash memory technology
• Compatible with JEDEC-standard byte-wide 32-pin
EPROM pinouts
• Package type:
– 32-pin plastic DIP
– 32-pin PLCC
GENERAL DESCRIPTION
The MX28F2000T is a 2-mega bit Flash memory or-
ganized as 256K bytes of 8 bits each. MXIC's Flash
memories offer the most cost-effective and reliable
read/write non-volatile random access memory. The
MX28F2000T is packaged in 32-pin PDIP and PLCC
. It is designed to be reprogrammed and erased in-
system or in-standard EPROM programmers.
The standard MX28F2000T offers access times as
fast as 90 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate
bus contention, the MX28F2000T has separate chip
enable (CE) and output enable (OE) controls.
MXIC's Flash memories augment EPROM function-
ality with in-circuit electrical erasure and
programming. The MX28F2000T uses a command
register to manage this functionality, while
maintaining a standard 32-pin pinout. The
command register allows for 100% TTL level control
inputs and fixed power supply levels during erase
and programming, while maintaining maximum
EPROM compatibility.
MXIC Flash technology reliably stores memory con-
tents even after 10,000 erase and program cycles.
The MXIC cell is designed to optimize the erase and
programming mechanisms. In addition, the combi-
nation of advanced tunnel oxide processing and low
internal electric fields for erase and programming
operations produces reliable cycling. The
MX28F2000T uses a 12.0V ± 5% VPP supply to
perform the Auto Program/Erase algorithms.
The highest degree of latch-up protection is
achieved with MXIC's proprietary non-epi process.
Latch-up protection is proved for stresses up to 100
milliamps on address and data pin from -1V to VCC
+ 1V.
P/N: PM0472
1 REV. 1.0, Jun 13, 1997


MX28F2000T 데이터시트, 핀배열, 회로
MX28F2000P Block Address and Block Structure
A17~A0
3FFFFH
3F000H
3EFFFH
3E000H
3DFFFH
3D000H
3CFFFH
3C000H
3BFFFH
3B000H
3AFFFH
3A000H
39FFFH
39000H
38FFFH
38000H
37FFFH
34000H
33FFFH
30000H
2FFFFH
2C000H
2BFFFH
28000H
27FFFH
24000H
23FFFH
20000H
1FFFFH
1C000H
1BFFFH
18000H
17FFFH
14000H
13FFFH
10000H
0FFFFH
0C000H
0BFFFH
08000H
07FFFH
04000H
03FFFH
00000H
4-K byte
4-K byte
4-K byte
4-K byte
4-K byte
4-K byte
4-K byte
4-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
MX28F2000T
P/N: PM0472
REV. 1.0, Jun 13, 1997
2




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MX28F2000T cmos

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2M-BIT [256K x 8] CMOS FLASH MEMORY - Macronix International



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2M-BIT [256K x 8] CMOS FLASH MEMORY - Macronix International