HYMP564S64CP6-S6 반도체 회로 부품 판매점
200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb
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 Hynix |
200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb C ver.
This Hynix unbuffered Small Outline Dual In-Line Memory Module(DIMM) series consists of 512Mb C ver. DDR2
SDRAMs in Fine Ball Grid Array(FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 512Mb C ver. based
Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of indus-
try standard. It is suitable for easy interchange and addition.
FEATURES
• JEDEC standard Double Data Rate2 Synchronous
DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power
Supply
• All inputs and outputs are compatible with SSTL_1.8
interface
• Posted CAS
• Programmable CAS Latency 3, 4, 5, 6
• OCD (Off-Chip Driver Impedance Adjustment) and
ODT (On-Die Termination)
• Fully differential clock operations (CK & CK)
• Programmable Burst Length 4 / 8 with both sequen-
tial and interleave mode
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
• Serial presence detect with EEPROM
• DDR2 SDRAM Package: 60ball(x8), 84ball(x16)
FBGA
• 67.60 x 30.00 mm form factor
• Lead-free Products are RoHS compliant
ORDERING INFORMATION
Part Name
HYMP532S64CP6-E3/C4/Y5/S5/S6
HYMP564S64CP6-E3/C4/Y5/S5/S6
HYMP512S64CP8-E3/C4/Y5/S5/S6
HYMP532S64CLP6-E3/C4/Y5/S5/S6
HYMP564S64CLP6-E3/C4/Y5/S5/S6
HYMP512S64CLP8-E3/C4/Y5/S5/S6
Density
256MB
512MB
1GB
256MB
512MB
1GB
Organization
32Mx64
64Mx64
128Mx64
32Mx64
64Mx64
128Mx64
# of
DRAMs
4
8
16
4
8
16
# of
ranks
1
2
2
1
2
2
Materials
Power
Consumption
Lead free*
Lead free
Lead free
Lead free
Lead free
Normal
Normal
Normal
Low
Low
Lead free
Low
Notes:
1. All Hynix’ DDR2 Lead-free parts are compliant to RoHS.
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.4 / Jul. 2007
1
1200pin Unbuffered DDR2 SDRAM SO-DIMMs
SPEED GRADE & KEY PARAMETERS
E3 C4
Y5
(DDR2-400) (DDR2-533) (DDR2-667)
Speed @CL3
Speed @CL4
Speed @CL5
Speed @CL6
CL-tRCD-tRP
400
533
-
-
3-3-3
533
533
-
-
4-4-4
400
533
667
-
5-5-5
S6
(DDR2-800)
-
533
667
800
5-5-5
S5
(DDR2-800)
-
533
800
-
5-5-5
Unit
Mbps
Mbps
Mbps
Mbps
tCK
ADDRESS TABLE
Density Organization Ranks
SDRAMs
# of
DRAMs
256MB 32M x 64
1 32Mb x 16
4
512MB
1GB
64M x 64
128M x 64
2 32Mb x 16
8
2 64Mb x 8 16
# of row/bank/column Address
13(A0~A12)/2(BA0~BA1)/10(A0~A9)
13(A0~A12)/2(BA0~BA1)/10(A0~A9)
14(A0~A13)/2(BA0~BA1)/10(A0~A9)
Refresh
Method
8K / 64ms
8K / 64ms
8K / 64ms
Rev. 0.4 / Jul. 2007
2
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관련 데이터시트
HYMP564S64CP6-S5
200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb - Hynix
HYMP564S64CP6-S6
200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb - Hynix