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National Semiconductor |
www.DataSheet4U.com
September 2007
LMH6515
600 MHz, Digital Controlled, Variable Gain Amplifier
General Description
The LMH6515 is a high performance, digitally controlled vari-
able gain amplifier (DVGA). It combines precision gain control
with a low noise, ultra-linear, differential amplifier. Typically,
the LMH6515 drives a high performance ADC in a broad
range of mixed signal and digital communication applications
such as mobile radio and cellular base stations where auto-
matic gain control (AGC) is required to increase system dy-
namic range. When used in conjunction with a high speed
ADC, system dynamic range can be extended by up to 32 dB.
The LMH6515 has a differential input and output allowing
large signal swings on a single 5V supply. It is designed to
accept signals from RF elements and maintain a terminated
impedance environment. The input impedance is 200Ω re-
sistive. The output impedance is either 200Ω or 400Ω and is
user selectable. A unique internal architecture allows use with
both single ended and differential input signals.
Input signals to the LMH6515 are scaled by a highly linear,
digitally controlled attenuator with 31 accurate 1 dB steps.
The attenuator output provides the input signal for a high gain,
ultra linear differential transconductor. The transconductor
differential output current can be converted into a voltage by
using the on-chip 200Ω or 400Ω loads. The transconductance
gain is 0.1 Amp/Volt resulting in a maximum voltage gain of
+26 dB when driving a 200Ω load, or 32 dB when driving the
400Ω load. On chip digital latches are provided for local stor-
age of the gain setting. The gain step settling time is 5 ns and
care has been taken to reduce the sensitivity of bandwidth
and phase to gain setting.
The LMH6515 operates over the industrial temperature range
of −40°C to +85°C. The LMH6515 is available in a 16-Pin,
thermally enhanced, LLP package.
Features
■ Adjustable gain with a 31 dB range
■ Precise 1 dB gain steps
■ Parallel 5 bit gain control
■ On chip register stores gain setting
■ Fully differential signal path
■ Single ended to differential capable
■ 200Ω input impedance
■ Small footprint (4 mm x 4 mm) LLP package
Key Specifications
■ 600 MHz bandwidth @ 100Ω load
■ 40 dBm OIP3 @ 75 MHz, 200Ω load
■ 20 dB to 30 dB maximum gain
■ Selectable output impedance of 200Ω or 400Ω.
■ 8.3 dB noise figure
■ 5 ns gain step switching time
■ 100 mA supply current
Applications
■ Cellular base stations
■ IF sampling receivers
■ Instrumentation
■ Modems
■ Imaging
■ Differential line receiver
Typical Application
LMH™ is a trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation 202143
20214301
www.national.com
www.DataSheet4U.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
Machine Model
Positive Supply Voltage (Pin 3)
Output Voltage (pin 14,15)
Differential Voltage Between Any
Two Grounds
Analog Input Voltage Range
Digital Input Voltage Range
Output Short Circuit Duration
(one pin to ground)
Junction Temperature
1.2 kV
150V
−0.6V to 5.5V
−0.6V to 6.8V
<200 mV
−0.6V to VCC
−0.6V to 3.6V
Infinite
+150°C
Storage Temperature Range
Soldering Information
Infrared or Convection (20 sec)
Wave Soldering (10 sec)
−65°C to +150°C
235°C
260°C
Operating Ratings (Note 1)
Supply Voltage (Pin 3)
Output Voltage Range (Pin 14, 15)
Differential Voltage Between Any
Two Grounds
Analog Input Voltage Range,
AC Coupled
Temperature Range (Note 3)
Package Thermal Resistance (θJA)
16-Pin LLP
4V to 5.25V
1.4V to 6.4V
<10 mV
±1.4V
−40°C to +85°C
47°C/W
5V Electrical Characteristics (Note 4)
The following specifications apply for single supply with VCC = 5V, Maximum Gain , RL = 100 Ω (200Ω external || 200Ω internal),
VOUT = 2 VPP, fin = 150 MHz. Boldface limits apply at temperature extremes.
Symbol
Parameter
Conditions
Min Typ Max
(Note 6) (Note 5) (Note 6)
Units
Dynamic Performance
SSBW −3 dB Bandwidth
Average of all Gain Settings
600 MHz
Noise and Distortion
OIP3
Third Order Intermodulation
Products
Output 3rd Order Intercept Point
f = 75 MHz, 2 VPP
f = 150 MHz, 2 VPP
f = 250 MHz, 2 VPP
f = 450 MHz, 2 VPP
f = 75 MHz
−76
−72
dBc
−66
−58
39
f = 150 MHz
37
P1 dB
Output Level for 1 dB Gain
Compression
f = 250 MHz
f = 75 MHz, RL= 200Ω
f = 150 MHz, RL= 200Ω
f= 250 MHz, RL= 200Ω
f = 75 MHz, R L= 200Ω
f = 250 MHz, R L= 200Ω
f = 75 MHz
34
40 dBm
37
34
16.7
14.7
dBm
14.5
f = 450 MHz
13.2
VNI Input Noise Voltage
Maximum Gain, f = 40 MHz
1.8 nV/
VNO
Output Noise Voltage
Maximum Gain, f = 40 MHz
18 nV/
NF Noise Figure
Maximum Gain
8.3 dB
Analog I/O
Differential Input Resistance
165 186 210
160 220
Ω
Input Common Mode Resistance
825 971 1120
785 1160
Ω
Differential Output Impedance
Low Gain Option
187
High Gain Option
330 370 410
325 415
Ω
Internal Load Resistors
Between Pins 13, 14 and Pins 15, 16
165
187
210
160 235
Ω
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