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Agilent AMMC-5023
23 GHz Low Noise Amplifier
(21.2 – 26.5 GHz)
Data Sheet
Chip Size:
Chip Size Tolerance:
Chip Thickness:
Pad Dimensions:
1880 x 600 µm (74 x 23.6 mils)
±10 µm (±0.4 mils)
100 ± 10 µm (4 ± 0.4 mils)
80 x 80 µm (3.1 x 3.1 mils), or larger
Features
• Frequency range: 21.2 – 26.5 GHz
• High gain: 23 dB
• Low noise figure: 2.3 dB
• Input and output return loss: >10 dB
• Single supply bias: 5 volts, 28 mA
• Optional bias adjust
Applications
• Digital Radio Communication
Systems (21.2–23.6 GHz and
24.5–26.5 GHz)
• Any narrow band application
within 21 –26 GHz
• 24.1 GHz collision avoidance
• Front-end gain stage
Description
Agilent’s AMMC-5023 is a high
gain, low noise amplifier that
operates from 21 GHz to over
30 GHz. By eliminating the
complex tuning and assembly
processes typically required by
hybrid (discrete-FET) amplifiers,
the AMMC-5023 is a cost-effective
alternative in both 21.2–23.6 GHz
and 24.5–26.5 GHz communica-
tions receivers. The device has
good input and output match to
50 Ohm and is unconditionally
stable to more than 40 GHz. The
backside of the chip is both RF
and DC ground. This helps
simplify the assembly process
and reduces assembly related
performance variations and
costs. It is fabricated in a PHEMT
process to provide exceptional
noise and gain performance.
Absolute Maximum Ratings[1]
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Symbol Parameters/Conditions
Units
Min.
VD1, VD2
Drain Supply Voltage
V
VG1, VG2
Gate Supply Voltage
V 0.4
ID1 Drain Supply Current
mA
ID2 Drain Supply Current
mA
Pin RF Input Power
dBm
Tch Channel Temperature
°C
Tb
Operating Backside Temperature
°C
-55
Tstg Storage Temperature
°C -65
Tmax Max. Assembly Temp (60 sec max) °C
Notes:
1. Absolute maximum ratings for continuous operation unless otherwise noted.
Max.
8
2
35
35
15
+150
+140
+165
+300
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AMMC-5023 DC Specifications/Physical Properties[1]
Symbol Parameters and Test Conditions
Units Min. Typ. Max.
VD1, VD2
Recommended Drain Supply Voltage
V 357
VG1, VG2
Gate Supply Voltage[2] (VD1 ≤ VD1(max), VD2 ≤ VD2(max))
V 0.8
ID1, ID2
Input and Output Stage Drain Supply Current (VG1 = VG2 = Open, VD1 = VD2 = 5 V)
mA
14
ID1+ID2
Total Drain Supply Current (VG1 = VG2 = Open, VD1 = VD2 = 5 V)
mA 13 28 35
θch-b Thermal Resistance[3] (Backside temperature, Tb = 25°C)
°C/W
44
Notes:
1. Backside ambient operating temperature TA = 25°C unless otherwise noted.
2. Open circuit voltage at VG1 and VG2 when VD1 and VD2 are 5 Volts.
3. Channel-to-backside Thermal Resistance (θch-b) = 66°C/W at Tchannel (Tc) = 150°C as measured using the liquid crystal method. Thermal Resistance at
backside temperature (Tb) = 25°C calculated from measured data.
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RF Specifications[4] (VG1 = VG2 = Open, VD1 = VD2 = 5V, ID1 + ID2 = 28 mA, Zin = Z0 = 50Ω)
Symbol
Parameters and Test Conditions
Units
21.2– 23.6 GHz
Min. Typ. Max.
|S21|2
∆ |S21|2
RLin
RLout
|S12|2
P-1dB
Small-signal Gain
Small-signal Gain Flatness
Input Return Loss
Output Return Loss
Isolation
Output Power @ 1 dB Gain Compression
f = 23 GHz
dB 21
dB
dB 10
dB 9
DataShedBet4U.com40
dBm
23.6
±1.5
12
12
50
9.5
Psat Saturated Output Power
(@ 3 dB Gain Compression)
dBm
OIP3
Output 3rd Order Intercept Point,
22.4 GHz
dB
Rfin1 = Rfin2 = -20 dBm, ∆f = 2 MHz
25.5 GHz
NF Noise Figure
22 GHz
25 GHz
dB
10.5
18
2.3
Note:
4. 100% on-wafer RF test is done at frequency = 21.2, 22.4, 23.6, 24.5, 25.5 and 26.5 GHz, except as noted.
28
2.8
24.5– 26.5 GHz
Min. Typ. Max.
17 19 25
±1.2
10 11.5
10 17
40 43
10
11.5
24
2.3 2.8
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