PDF TR8100 Data sheet ( Hoja de datos )

Número de pieza	TR8100
Descripción	Hybrid Transceiver
Fabricantes	RF Monolithics
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No Preview Available ! ® • Designed for Short-Range Wireless Data Communications • Supports RF Data Transmission Rates Up to 115.2 kbps • 3 V, Low Current Operation plus Sleep Mode • Up to 10 mW Transmitter Power under FCC 15.247 Regulations The TR8100 hybrid transceiver is ideal for short-range wireless data applications where robust operation, small size, low power consumption and low cost are required. The TR8100 employs RFM’s amplifier-sequenced hybrid (ASH) architecture to achieve this unique blend of character- istics. All critical RF functions are contained in the hybrid, simplifying and speeding design-in. The receiver section of the TR8100 is sensitive and stable. A wide dynamic range log detector, in combination with digital AGC and a compound data slicer, provide robust performance in the presence of on-channel interference or noise. Two stages of SAW filtering provide excellent re- ceiver out-of-band rejection. The transmitter uses an internal “digital modulation” BPSK spread- ing code, with data carried by either OOK or ASK modulation. The transmitter employs SAW filtering to suppress output harmonics, facilitating compliance with FCC 15.247 regulations. Absolute Maximum Ratings Rating Power Supply and All Input/Output Pins Non-Operating Case Temperature Soldering Temperature (10 seconds, 5 cycles maximum) Value -0.3 to +4.0 -50 to +100 260 Units V °C °C TR8100 916.50 MHz Hybrid Transceiver www.DataSheet4U.com Electrical Characteristics Characteristic Operating Frequency Digital Modulation Spreading Code Data Modulation Type OOK Data Rate ASK Data Rate Receiver Performance Sensitivity, 4.8 kbps, 10-3 BER, AM Test Method Sensitivity, 4.8 kbps, 10-3 BER, Pulse Test Method Current, 4.8 kbps Sensitivity, 19.2 kbps, 10-3 BER, AM Test Method Sensitivity, 19.2 kbps, 10-3 BER, Pulse Test Method Current, 19.2 kbps Sensitivity, 115.2 kbps, 10-3 BER, AM Test Method Sensitivity, 115.2 kbps, 10-3 BER, Pulse Test Method Current, 115.2 kbps Receiver Out-of-Band Rejection, ±5% fo Receiver Ultimate Rejection Sym fo R±5% RULT Notes Minimum 916.30 Typical BPSK OOK/ASK Maximum 916.70 Units MHz 30 115.2 kb/s kb/s 1 -108 dBm 1 -102 dBm 4.2 mA 1 -104 dBm 1 -98 dBm 4.25 mA 1 -99 dBm 1 -93 dBm 4.3 mA 2 80 dB 2 100 dB RF Monolithics, Inc. Phone: (972) 233-2903 Fax: (972) 387-8148 RFM Europe Phone: 44 1963 251383 Fax: 44 1963 251510 ©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc. E-mail: [email protected] http://www.rfm.com TR8100-021307 Page 1 of 14 1 page Power Down Control TX CN CN CN MOD TRL1 TRL0 FGR RTXM 8 17 18 Programming and Control 19 Antenna RFIO 20 ESD Choke SAW CR Filter VCC1: Pin 2 VCC3: Pin 3 VCC2: Pin 16 GND1: Pin 1 GND2: Pin 10 TXA2 X TXA1 RFA1 X SAW Delay Line Temperature Compensated Master Oscillator Local Oscillator, Pulse Generator & RF Amp Bias 15 3G ASH Transceiver Block Diagram Log RFA2 Detector Low-Pass Filter LPFADJ 9 RLPF AGC Set Gain Select BB AGC Control AGC Reset BBOUT Peak Ref 56 CBBO Detector PKDET 4 CPKD DS2 dB Below Peak Thld AND AGC DS1 Ref Thld Threshold Control 13 THLD1 RTH1 11 12 THLD2 RTH2 RREF Baud Rate Selection Data/Clock Recovery 7 RXDATA RXDCLK 14 Figure 2 Receiver Chain The output of the SAW filter drives amplifier RFA1. This amplifier includes provisions for detecting the onset of saturation (AGC Set), and for switch- ing between 35 dB of gain and 5 dB of gain (Gain Select). AGC Set is an input to the AGC Control function, and Gain Select is the AGC Control function output. ON/OFF control to RFA1 (and RFA2) is generated by the Pulse Generator & RF Amp Bias function. The output of RFA1 drives the SAW delay line, which has a nominal delay of 0.5 µs. The second amplifier, RFA2, provides 51 dB of gain below saturation. The output of RFA2 drives a full-wave detector with 19 dB of threshold gain. The onset of saturation in each section of RFA2 is detected and summed to provide a logarithmic response. This is added to the output of the full- wave detector to produce an overall detector response that is square law for low signal levels, and transitions into a log response for high signal lev- els. This combination provides excellent threshold sensitivity and more than 70 dB of detector dynamic range. In combination with the 30 dB of AGC range in RFA1, more than 100 dB of receiver dynamic range is achieved. The detector output drives a gyrator filter. The filter provides a three-pole, 0.05 degree equiripple low-pass response with excellent group delay flat- ness and minimal pulse ringing. The 3 dB bandwidth of the filter can be set from 4.5 kHz to 1.8 MHz with an external resistor. The filter is followed by a base-band amplifier which boosts the detected signal to the BBOUT pin with the receiver RF amplifiers operating at a 50%-50% duty cycle, the BBOUT signal changes about 10 mV/dB, with a peak-to-peak signal level of up to 450 mV. The detected signal is riding on a 1.5 Vdc level that varies somewhat with supply voltage, temperature, etc. BBOUT is coupled to the CMPIN pin, or to an external data recovery process (DSP), by a series capacitor. The correct value of the series capacitor depends on data rate, data run length, and other factors as dis- cussed in the ASH Transceiver Designer’s Guide. When an external data recovery process is used with AGC, BBOUT must be coupled to the external data recovery process and to CMPIN by sepa- rate series coupling capacitors. The AGC reset function is driven by the signal applied to CMPIN. Data Slicers The CMPIN pin drives two data slicers, which convert the analog signal from BBOUT back into a digital stream. The best data slicer configuration depends on the system operating parameters. Data slicer DS1 is a capac- itively-coupled comparator with provisions for an adjustable threshold. DS1 provides the best performance at low signal-to-noise conditions. The threshold, or squelch, offsets the comparator’s slicing level from 0 to 90 mV, and is set with a resistor between the RREF and THLD1 pins. This threshold allows a trade-off between receiver sensitivity and output noise density in the no-signal condition. For best sensitivity, the threshold is set to zero but a minimum of 9 mv should be used for proper AGC action. In this case, noise is output continuously when no signal is present. This, in turn, requires the circuit being driven by the RXDATA pin to be able to pro- cess noise (and signals) continuously. This can be a problem if RXDATA is driving a circuit that must sleep when data is not present to conserve power, or when it its necessary to minimize false interrupts to a multitasking processor. In this case, noise can be greatly reduced by increasing the threshold level, but at the expense of sensitivity. The best 3 dB bandwidth for the low-pass filter is also affected by the threshold level setting of DS1. The bandwidth must be increased as the threshold is increased to minimize data pulse-width variations with sig- nal amplitude. RF Monolithics, Inc. Phone: (972) 233-2903 Fax: (972) 387-8148 RFM Europe Phone: 44 1963 251383 Fax: 44 1963 251510 ©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc. E-mail: [email protected] http://www.rfm.com TR8100-021307 Page 5 of 14 5 Page Control Register Read/Write Detail Single Byte Write Sequence The write, address and data bits are clocked into the radio (left to right) on the rising edge of the clock input to Pin 18. Pin 19 Pin 18 Pin 17 W A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Single Byte Read Sequence The read and address bits and are clocked into the radio on the rising edge of the clock input to Pin 18; data is output on the rising edge of the clock and should be read into the host on the falling edge of the clock. Pin 19 Pin 18 Pin 17 R A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Multi-byte Write Sequence Address increments automatically and rolls over from address 2 to address 0. Pin 19 Pin 18 Pin 17 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 next to last byte last data byte Multi-byte Read Sequence Address increments automatically and rolls over from address 2 to address 0. Pin 19 Pin 18 Pin 17 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 next to last byte last data byte Figure 4 RF Monolithics, Inc. Phone: (972) 233-2903 Fax: (972) 387-8148 RFM Europe Phone: 44 1963 251383 Fax: 44 1963 251510 ©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc. E-mail: [email protected] http://www.rfm.com TR8100-021307 Page 11 of 14 11 Page

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