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PDF MB3873 Data sheet ( Hoja de datos )
| Número de pieza | MB3873 | |
| Descripción | Multi-Resonance AC/DC Converter IC | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27223-1E
ASSP For Power Supply Applications
Multi-Resonance AC/DC Converter IC
MB3873
s DESCRIPTION
The MB3873 is a pulse frequency modulation (PFM) type multi-resonance AC/DC converter IC providing soft
switching functions in a more compact, higher-efficiency, low-noise package.
Since this product allows reduced number of the components and reduced size of the transformer, it is also
compatible with the miniaturization of AC adaptor.
The product retains the multi-resonance for the non-load, over-load and load short-circuit over the wide range of
input voltage, making it the appropriate IC for the small-sized AC adaptor.
s FEATURES
• Operating power supply voltage : 10V to 28V
• Operating current : 2.5mA typ.
• Low standby current : 400µA typ.
• Control frequency range : 10kHz to 800kHz
• Operating temperature range : −30°C to +105°C
• Soft start circuit on-chip
• Overvoltage detection circuit on-chip
(Continued)
s PACKAGE
16-pin plastic SOP
(FPT-16P-M06)
1 page  
MB3873
s ABSOLUTE MAXIMUM RAGINGS
Parameter
Symbol
Conditions
Rating
Min.
Max.
Unit
Power supply voltage
VCC VCC, VCC (O) pin
— 30 V
Output current
IO OUT pin
— 20 mA
Peak output current
IO OUT pin, Duty ≤ 5 %
—
300 mA
Power dissipation
PD Ta ≤ +25°C
—
540*
mW
Storage temperature
Tstg
—
−55
+125
°C
* : The packages are mounted on the dual-sided epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Conditions
Power supply voltage
Reference voltage output current
Input voltage
Output current
Triangular wave
oscillator frequency
Timing capacitor
Timing resistor
Control frequency
OSC control current
Soft start capacitor
Delay time capacitor
Dead time resistor
Operating ambient temperature
VCC
VCC (O)
IOR
VIN
IO
—
—
VCC (O) = VREF
OTP, OVP pin
+IN, –IN pin
OUT pin
fOSC FB = VREF, CS = OPEN
CT —
RT —
fOSC FB controlled
IFB FB pin
CS —
CD —
RD —
Ta —
Min.
10
5
–10
0
0
–15
10
100
15
10
–1
—
—
36
–30
Value
Typ.
18
VREF
—
—
—
—
105
220
33
105
—
0.1
0.1
120
25
Max.
28
28
0
VCC
VREF
15
300
4700
47
800
—
1.0
1.0
250
105
Unit
V
V
mA
V
V
mA
kHz
pF
kΩ
kHz
mA
µF
µF
kΩ
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
5
5 Page 
MB3873
s FUNCTIONAL DESCRIPTION
1. Switching Regulator Function
(1) Reference voltage circuit (Ref)
The reference voltage circuit takes the voltage from the Vcc terminal (pin 11) and generates a temperature-
compensated reference voltage ( =: 8V), which is used as the reference voltage supply for the IC internal circuit
bias and detection comparator.
A reference voltage can be output from the VREF terminal (pin 10) at levels up to 10mA.
(2) Triangular-wave oscillator circuit (OSC)
This circuit is used to generate a triangular oscillator waveform, by connecting timing capacitor and resistor to
the CT terminal (pin 2) and RT terminal (pin 1) respectively. The triangular waveform frequency fosc1 is set
according to the timing capacitor and resistor.
The triangular oscillator waveform is input to the IC’s internal dead time timing circuit (One-Shot-DTC), and can
be output from the CT terminal.
(3) Oscillator frequency control circuit (OSC Control)
The oscillator control circuit detects the AC/DC converter output voltage and outputs the PFM control signal to
the triangular wave oscillator. The FB terminal (pin 5) carries the AC/DC converter output voltage at the V/I
converted OSC control current. When an overload occurs, the detection signal to the overload detection circuit
(OCP Comp.) is also output here.
(4) Dead time timing circuit (One-Shot-DTC)
The dead time timing circuit converts the triangular waveform generated by the triangular wave oscillator to a
rectangular wave having a pulse width ( = dead time tDEAD) set by the dead time setup resistor that is connected
to the RD terminal (pin 3).
(5) Output circuit (Drive)
The output circuit has totem pole configuration, and outputs the PFM signal from the OUT terminal (pin 8). The
output circuit power is supplied from the Vcc (O) terminal (pin 9).
2. Protective Function
(1) Undervoltage lockout circuit (UVLO)
Power-on surges and momentary drops in power supply voltage can cause errors in control IC operation, which
can destroy or damage systems. To prevent the error operation, the UVLO Comp.1 circuit detects low voltage
conditions in the supply voltage (Vcc), and sets the VREF terminal (pin 10) to “L” level. The UVLO Comp.2 circuit
detects low voltage conditions in the reference voltage, and sets the OUT pin (pin 8) to “L” level.
Overvoltage/overload/over temperature conditions cause the error detection latch (Latch) to be set. If the VREF
terminal (pin 10) is set to “L” level, and the supply voltage falls below the UVLO circuit threshold voltage (VTHL),
the UVLO Comp.1 resets the error detection latch. Operation is restored when the power supply voltage returns
above the threshold voltage (VTHL) of the UVLO circuit.
The threshold voltage can be set to any desired level by connecting resistor between the ENB terminal (pin 12)
and GND terminal (pin 7), or between the ENB terminal (pin 12) and Vcc terminal (pin 11) (for internal resistance
constants see “BLOCK DIAGRAM”).
(2) Overvoltage detection comparator 1 (OVP Comp. 1)
When the input voltage at the OVP terminal (pin 14) is greater than the threshold voltage (=: 2.5V), the overvoltage
comparator 1 sets the error detection latch, and sets the VREF terminal (pin 10) and OUT terminal (pin 8) to “L”
level.
Note that if OVP Comp.1 is not used, the OVP terminal (pin 14) should be shorted to GND by the shortest path
(see “PROCESSING WHEN OVP PIN IS NOT USED”).
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet MB3873.PDF ] | |
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