DataSheet.es    


PDF Si4736-B20 Data sheet ( Hoja de datos )

Número de pieza Si4736-B20
Descripción BROADCAST WEATHER BAND RADIO RECEIVER
Fabricantes Silicon Laboratories 
Logotipo Silicon Laboratories Logotipo



Hay una vista previa y un enlace de descarga de Si4736-B20 (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! Si4736-B20 Hoja de datos, Descripción, Manual

Si4736/37/38/39-B20
BROADCAST WEATHER BAND RADIO RECEIVER
Features
NOAA weather band support (162.4– No manual alignment necessary
162.55 MHz)
Programmable reference clock
Worldwide FM band support
Volume control
(76–108 MHz)
Programmable soft mute control
Worldwide AM band support
Programmable de-emphasis
(520–1710 kHz) (Si4736/37 only)
RDS/RBDS processor (Si4737/39
1050 Hz alert tone detection
only)
Excellent real-world performance
Optional digital audio output (Si47/39
Freq synthesizer with integrated VCO only)
Advanced AM/FM seek tuning
Optional digital audio output
Automatic frequency control (AFC)
(Si4737/39 only)
Automatic gain control (AGC)
2-wire and 3-wire control interface
Integrated LDO regulator
2.7 to 5.5 V supply voltage
Digital FM stereo decoder
Firmware upgradeable
Adaptive noise suppression
3 x 3 x 0.55 mm 20-pin QFN package
AM/FM/WB digital tuning
Pb-free/RoHS compliant
Ordering Information:
See page 30.
Pin Assignments
Si4736/37/38/39-GM
(Top View)
Applications
Emergency radios
Table and portable radios
Stereos
Mini/micro systems
Portable media players
Boom boxes
Cellular handsets
Modules
Clock radios
Mini HiFi
Description
The Si4736/37/38/39 is the first digital CMOS AM/FM/WB radio receiver IC that
integrates the complete tuner function from antenna input to audio output.
NC 1
FMI 2
RFGND 3
AMI 4
RST 5
6
20 19 18 17 16
15 DOUT
GND
PAD
14 LOUT
13 ROUT
12 GND
7 8 9 10 11 VDD
Functional Block Diagram
AMI
AM
ANT RFGND
FM/
WB
ANT FMI
2.7– 5.5 V
VDD
GND
LNA
AGC
LNA
AGC
LDO
Si473x
RDS
(Si4737/
39)
LOW-IF
DIGITAL
AUDIO
(Si4737/
39)
DOUT
DFS
GPO/DCLK
ADC DAC
DSP
ADC DAC
ROUT
LOUT
AFC
CONTROL
INTERFACE
VIO
1.5–3.6 V
Patents pending
Notes:
1. To ensure proper operation and
receiver performance, follow the
guidelines in “AN383: Universal
Antenna Selection and Layout
Guidelines.” Silicon Laboratories will
evaluate schematics and layouts for
qualified customers.
2. Place Si4736/37/38/39 as close as
possible to antenna jack and keep
the FMI and AMI traces as short as
possible.
Rev. 1.0 4/08
Copyright © 2008 by Silicon Laboratories
Si4736/37/38/39-B20

1 page




Si4736-B20 pdf
Si4736/37/38/39-B20
Table 3. DC Characteristics
(VDD = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)
Parameter
Symbol Test Condition Min Typ Max
FM Mode
Supply Current
Supply Current1
RDS Supply Current2
Supply Current2
WB Mode
Supply Current
Supply Current
Supply Current
IFM
IFM
IFM
IFMD
Low SNR level
Digital Output Mode
IFM
IFM
IFMD
Low SNR level
19.2
19.8
19.9
18.0
19.2
19.8
17.2
22
23
23
20.5
22
23
20.5
AM Mode
Supply Current
Supply Current2
IAM
IAMD
Analog Output Mode
Digital Output Mode
17.3 20.5
15.5 20.5
Supplies and Interface
Interface Supply Current
VDD Powerdown Current
VIO Powerdown Current
High Level Input Voltage3
Low Level Input Voltage3
High Level Input Current3
Low Level Input Current3
High Level Output Voltage4
Low Level Output Voltage4
IIO — 320 600
IDDPD
— 10 20
IIOPD SCLK, RCLK inactive
1
10
VIH 0.7 x VIO — VIO + 0.3
VIL
–0.3
— 0.3 x VIO
IIH VIN = VIO = 3.6 V –10
10
IIL
VIN = 0 V,
–10 —
10
VIO = 3.6 V
VOH
IOUT = 500 µA
0.8 x VIO
VOL IOUT = –500 µA
— 0.2 x VIO
Notes:
1. LNA is automatically switched to higher current mode for optimum sensitivity in weak signal conditions.
2. Specifications are guaranteed by characterization.
3. For input pins SCLK, SEN, SDIO, RST, RCLK, DCLK, and DFS.
4. For output pins SDIO, DOUT, GPO1, GPO2, and GPO3.
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
V
V
µA
µA
V
V
Rev. 1.0
5

5 Page





Si4736-B20 arduino
Si4736/37/38/39-B20
Table 8. Digital Audio Interface Characteristics
(VDD = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)
Parameter
DCLK Cycle Time
DCLK Pulse Width High
DCLK Pulse Width Low
DFS Set-up Time to DCLK Rising Edge
DFS Hold Time from DCLK Rising Edge
DOUT Propagation Delay from DCLK Falling
Edge
Symbol Test Condition
tDCT
tDCH
tDCL
tSU:DFS
tHD:DFS
tPD:DOUT
Min
26
10
10
5
5
0
Typ Max Unit
— 1000 ns
— — ns
— — ns
— — ns
— — ns
— 12 ns
DCLK
DFS
DOUT
tDCH
tDCL
tDCT
tHD:DFS
tSU:DFS
tPD:OUT
Figure 8. Digital Audio Interface Timing Parameters, I2S Mode
Rev. 1.0
11

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet Si4736-B20.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
Si4736-B20BROADCAST WEATHER BAND RADIO RECEIVERSilicon Laboratories
Silicon Laboratories

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar