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PDF MICRF009 Data sheet ( Hoja de datos )

Número de pieza MICRF009
Descripción QwikRadio Low-Power UHF Receiver
Fabricantes Micrel Semiconductor 
Logotipo Micrel Semiconductor Logotipo



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No Preview Available ! MICRF009 Hoja de datos, Descripción, Manual

MICRF009
www.DataSheet4U.com
QwikRadio® Low-Power UHF Receiver
General Description
The MICRF009 is a single chip, ASK/OOK (ON-OFF
Keyed) RF receiver IC. It provides the same function but
with performance enhancements over earlier QwikRadio®
receivers. Two key improvements are: higher sensitivity
(typically 6dB higher than the MICRF002) and faster
recovery from shutdown (typically 1ms). Just like all other
members of the QwikRadio® family, the MICRF009
achieves low power operation, a very high level of
integration, and it is particularly easy to use.
All post-detection (demodulator) data filtering is provided
on the MICRF009, so no external baseband filters are
required. One of two filter bandwidths may be selected
externally by the user. The user only needs to program the
appropriate filter selection based on the data rate and code
modulation format.
The MICRF009 offer two modes of operation; fixed-mode
(FIX) and sweep-mode (SWP). In fixed-mode the
MICRF009 functions as a conventional superheterodyne
receiver. In sweep-mode the MICRF009 employs a
patented sweeping function to sweep a wider RF spectrum.
Fixed-mode provides better selectivity and sensitivity
performance while sweep mode enables the MICRF009 to
be used with low-cost, imprecise transmitters.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
Ordering Information
Features
Insert as inline graphic
QwikRadio®
High sensitivity (–104dBm)
Fast recovery from shutdown (1ms)
300MHz to 440MHz frequency range
Data-rate up to 2.0kbps (fixed-mode, Manchester encoding)
Low power consumption
2.9mA fully operational (315MHz)
0.15µA in shutdown
290µA in polled mode (10:1 duty-cycle)
Shutdown input
Automatic tuning, no manual adjustment
Very low RF re-radiation at the antenna
Highly integrated with extremely low external part count
1ms time to good data
Applications
Automotive remote keyless entry (RKE)
Long range RF identification
Remote fan and light control
Garage door and gate openers
Part Number
MICRF009BM
Demodulator Bandwidth
User Programmable
Operating Mode
Fixed or Sweep
Shutdown
Yes
Package
16-pin SOIC
Typical Application
315Mhz 1200Bps On-Off Keyed Receiver
Fixed Mode
Power, Connect and Protect is a trademark of Micrel, Inc.
QwikRadio is a registered trademark of Micrel, Inc. The QwikRadio Ics were developed under a partnership agreement with AIT of Orlando, Florida.
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax +1 (408) 474-1000 • http://www.micrel.com
January 18, 2005
M9999-011805
(408) 955-1690

1 page




MICRF009 pdf
Micrel
Typical Characteristics
Supply Current
vs. Frequency
6.0
TA = 25°C
VDD = 5V
4.5
3.0
1.5
250
Sweep Mode,
Continuous Operation
300 350 400 450 500
FREQUENCY (MHz)
Supply Current
vs. Temperature
3.5
f = 315MHz
VDD = 5V
3.0
2.5
2.0
1.5
-40 -20
Sweep Mode,
Continuous Operation
0 20 40 60 80 100
TEMPERATURE (°C)
MICRF009
www.DataSheet4U.com
January 18, 2005
5
M9999-011805
(408) 955-1690

5 Page





MICRF009 arduino
Micrel
Figure 3 illustrates the CAGC pin interface circuit. The
AGC control voltage is developed as an integrated current
into a capacitor CAGC. The attack current is nominally
7µA, while the decay current is a 10 times scaling of this,
approximately 85µA. Signal gain of the RF/IF strip inside
the IC diminishes as the voltage on CAGC decreases. By
simply adding a capacitor to CAGC pin, the attack/decay
time constant ratio is fixed at 10:1. Modification of the
attack/decay ratio is possible by adding resistance from the
CAGC pin to either VDDBB or VSSBB, as desired.
Both the push and pull current sources are disabled during
shutdown, which maintains the voltage across CAGC, and
improves recovery time in duty-cycled applications. To
further improve duty-cycle recovery, both push and pull
currents are increased by 2 times for approximately 10ms
after release of the SHUT pin. This allows rapid recovery of
any voltage droop on CAGC while in shutdown.
DO Pin
The output stage for the digital output (DO) is shown in
Figure 4. The output is a 45µA push and 45µA pull
switched-current stage. This output stage is capable of
driving CMOS loads. An external buffer-driver is
recommended for driving high capacitance loads.
MICRF009
www.DataSheet4U.com
Figure 5. REFOSC Pin
SEL0, SEL1, SWEN, and SHUT Pins
Figure 6a. SEL0/SEL1/SWEN Pins
Figure 4. DO Pin
REFOSC1 and REFOSC2 Pin
The REFOSC input circuit is shown in Figure 5. Input
impedance is quite high (200k). This is a Colpitts
oscillator, with internal 10pF capacitors. This input is
intended to work with standard crystal resonators,
connected from this pin to REFOSC2.
This REFOSC2 pin appears as a low resistance path to
VSS during normal operation and is an input to a buffer
amplifier used during the initial start up phase to ensure
rapid build up of crystal oscillations.
The resonators should not contain integral capacitors,
since these capacitors are contained inside the IC.
Externally applied signals should be AC-coupled,
amplitude limited to approximately 0.5VPP. The nominal
DC bias voltage on this pin is 1.4V
Figure 6b. SHUT Pin
Control input circuitry is shown in Figure 6a and 6b. The
standard input is a logic inverter constructed with minimum
geometry MOSFETs (Q2, Q3). P-Channel MOSFET Q1 is
a large channel length device, which functions essentially
as a “weak” pull-up to VDDBB. Typical pull-up current is
5µA, leading to an impedance to the VDDBB supply of
typically 1M.
January 18, 2005
11
M9999-011805
(408) 955-1690

11 Page







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