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PDF HY64UD16162B Data sheet ( Hoja de datos )
| Número de pieza | HY64UD16162B | |
| Descripción | 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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Document Title
1M x 16 bit Low Low Power 1T/1C Pseudo SRAM
Revision history
Revision No. History
1.0 Initial
HY64UD16162B Series
Draft Date Remark
Dec. 3. ’02 Preliminary
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not
assume any responsibility for use of circuits described. No patent licenses are implied.
Revision 1.0 / December. 2002
1
1 page  
HY64UD16162B Series
AC CHARACTERISTICS
Vdd=2.7V~3.3V, Vddq=2.7V~3.3V, TA = -25°C to 85°C(E) / -40°C to 85°C(I), unless otherwise specified
# Symbol
Parameter
-60 -70
Min. Max. Min. Max.
Unit
Read Cycle
1 tRC Read Cycle Time
60 - 70 -
ns
2 tAA Address Access Time
- 60 - 70 ns
3 tACS Chip Select Access Time
- 60 - 70 ns
4 tOE Output Enable to Output Valid
- 20 - 20 ns
5 tBA /LB, /UB Access Time
- 60 - 70 ns
6 tCLZ Chip Select to Output in Low Z
10 - 10 -
ns
7 tOLZ Output Enable to Output in Low Z
5 - 5 - ns
8 tBLZ /LB, /UB Enable to Output in Low Z
10 - 10 -
ns
9 tCHZ Chip Disable to Output in High Z
0 10 0 10 ns
10 tOHZ Out Disable to Output in High Z
0 10 0 10 ns
11 tBHZ /LB, /UB Disable to Output in High Z
0 10 0 10 ns
12 tOH Output Hold from Address Change
5 - 5 - ns
Write Cycle
13 tWC Write Cycle Time
60 - 70 -
ns
14 tCW Chip Selection to End of Write
55 - 60 -
ns
15 tAW Address Valid to End of Write
55 - 60 -
ns
16 tBW /LB, /UB Valid to End of Write
55 - 60 -
ns
17 tAS Address Set-up Time
0 - 0 - ns
18 tWP Write Pulse Width
50 - 50 -
ns
19 tWR Write Recovery Time
0 - 0 - ns
20 tWHZ Write to Output in High Z
0 15 0 20 ns
21 tDW Data to Write Time Overlap
25 - 30 -
ns
22 tDH Data Hold from Write Time
0 - 0 - ns
23 tOW Output Active from End of Write
5 - 5 - ns
AC TEST CONDITIONS
TA = -25°C to 85°C(E) / -40°C to 85°C(I), unless otherwise specified
Parameter
Value
Input Pulse Level
0.4V to 2.2V
Input Rising and Fall Time
5ns
Input Timing Reference Level
1.5V
Output Timing Reference Level
0.5*Vddq
Output Load
See Below
AC TEST LOADS
DOUT
Z0=50 Ohm
RL=50 Ohm
CL1 =50 pF
VL=0.5*Vddq
Note
1. Including jig and scope capacitance.
Revision 1.0 / December. 2002
5
5 Page 
MARKING INFORMATION
Package
HY64UD16162B Series
Marking Example
FBGA
H Y U D 1 6 1 6 2B
css t
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xxxxx
KOR
• HYUD16162B
HY
U
D
16
16
2
B
•c
• ss
•t
• yy
• ww
•p
• xxxxx
• KOR
Index
: Part Name
: HYNIX
: Power Supply
: Tech. + Classification
: Bit Organization
: Density
: Mode
: Version
: Vdd=2.7V~3.3V/Vddq=2.7V~3.3V
: 1T+1C
: x16
: 16M
: 1CS with /UB,/LB;tCS
: 3rd Generation
: Power Consumption : D – Low Low Power
: Speed
: 60 – 60ns
70 – 70ns
: Temperature
: E – Extended(-25 ~ 85°C)
I – Industrial(-40 ~ 85°C)
: Year (ex : 02 = year 2002, 03= year 2003)
: Work Week ( ex : 12 = work week 12 )
: Process Code
: Lot No.
: Origin Country
Note
- Capital Letter
- Small Letter
: Fixed Item
: Non-fixed Item
Revision 1.0 / December. 2002
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet HY64UD16162B.PDF ] | |
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