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PDF NTD4860N Data sheet ( Hoja de datos )

Número de pieza NTD4860N
Descripción Power MOSFET ( Transistor )
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NTD4860N
Power MOSFET
25 V, 65 A, Single N-Channel, DPAK/IPAK
Features
ăTrench Technology
ăLow RDS(on) to Minimize Conduction Losses
ăLow Capacitance to Minimize Driver Losses
ăOptimized Gate Charge to Minimize Switching Losses
ăThese are Pb-Free Devices
Applications
ăVCORE Applications
ăDC-DC Converters
ăHigh/Low Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain
Current RqJA
(Note 1)
VDSS 25 V
VGS ±20 V
TA = 25°C
ID
13 A
TA = 85°C
10
Power Dissipation
RqJA (Note 1)
Continuous Drain
Current RqJA
(Note 2)
Power Dissipation
RqJA (Note 2)
Continuous Drain
Current RqJC
(Note 1)
TA = 25°C
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
PD
ID
PD
ID
2.0 W
10.4 A
8.0
1.28 W
65 A
50
Power Dissipation
RqJC (Note 1)
Pulsed Drain
Current
TC = 25°C
tp=10ms TA = 25°C
PD
IDM
50 W
130 A
Current Limited by Package
TA = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
IDmaxPkg
TJ,
TSTG
IS
dV/dt
45
-55 to
+175
42
6
A
°C
A
V/ns
Single Pulse Drain-to-Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 13 Apk, L = 1.0 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
EAS
TL
84.5 mJ
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
25 V
RDS(ON) MAX
7.5 mW @ 10 V
11.1 mW @ 4.5 V
D
ID MAX
65 A
G
S
N-CHANNEL MOSFET
4
4
4
12
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
1 23
1
2
3
CASE 369AC CASE 369D
3 IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
Y = Year
WW = Work Week
4860N = Device Code
G = Pb-Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©Ă Semiconductor Components Industries, LLC, 2007
December, 2007 - Rev. 0
1
Publication Order Number:
NTD4860N/D
Free Datasheet http://www.datasheet4u.com/

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NTD4860N pdf
NTD4860N
TYPICAL PERFORMANCE CURVES
2000
1500
Ciss
VGS = 0 V
TJ = 25°C
1000
500
Coss
Crss
0
0
5
10 15 20
DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
25
1000
VDD = 15 V
ID = 15 A
VGS = 11.5 V
100
td(off)
tr
10 td(on)
tf
1
1
1000
10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
100
10 ms
10 100 ms
VGS = 20 V
SINGLE PULSE
1 TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
0.1
0.1
PACKAGE LIMIT
1
10
1 ms
10 ms
dc
100
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
10
QT
8
6
4 Q1
Q2
VGS
2
ID = 30 A
TJ = 25°C
0
0 5 10 15 20 25
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate-To-Source and Drain-To-Source
Voltage vs. Total Charge
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
0
0.4 0.5 0.6
0.7 0.8 0.9 1.0
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
100
90 ID = 13 A
80
70
60
50
40
30
20
10
0
25 50
75 100 125 150 175
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
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