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PDF SIR484DP Data sheet ( Hoja de datos )

Número de pieza SIR484DP
Descripción N-Channel MOSFET
Fabricantes Vishay Siliconix 
Logotipo Vishay Siliconix Logotipo



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No Preview Available ! SIR484DP Hoja de datos, Descripción, Manual

N-Channel 20-V (D-S) MOSFET
SiR484DP
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
20 0.0083 at VGS = 10 V
0.0115 at VGS = 4.5 V
PowerPAK SO-8
ID (A)a, g
20
20
Qg (Typ.)
7.1 nC
6.15 mm
S
1S
5.15 mm
2
S
3
G
4
D
8D
7
D
6
D
5
Bottom View
Ordering Information: SiR484DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
FEATURES
Halogen-free
TrenchFET® Power MOSFET
• Low Thermal Resistance PowerPAK®
Package with Low 1.07 mm Profile
• Optimized for High-Side Synchronous Rectifier
Operation
• 100 % Rg Tested
• 100 % UIS Tested
D
APPLICATIONS
• Notebook CPU Core
- High-Side Switch
• POL
G
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
TC = 70 °C
TA = 25 °C
ID
Pulsed Drain Current
TA = 70 °C
IDM
Continuous Source-Drain Diode Current
TC = 25 °C
TA = 25 °C
IS
Single Pulse Avalanche Current
Avalanche Energy
L = 0.1 mH
IAS
EAS
TC = 25 °C
Maximum Power Dissipation
TC = 70 °C
TA = 25 °C
PD
Operating Junction and Storage Temperature Range
TA = 70 °C
TJ, Tstg
Soldering Recommendations (Peak Temperature)d, e
Limit
20
± 20
20g
20g
17.2b, c
13.7b, c
50
20g
3.2b, c
22
24
29.8
19.0
3.9b, c
2.5b, c
- 55 to 150
260
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
t 10 s
Steady State
Symbol
RthJA
RthJC
Typical
27
3.5
Maximum
32
4.2
Unit
°C/W
Notes:
a. Base on TC = 25 °C.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See Solder Profile (http://www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
www.DataSisheneott4rUeq.cuoirmed to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under Steady State conditions is 70 °C/W.
g. Package Limited.
Document Number: 69024
S-82664-Rev. A, 03-Nov-08
www.vishay.com
1

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SIR484DP pdf
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
60
50
40
30
Package Limited
20
10
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Current Derating*
40 2.5
SiR484DP
Vishay Siliconix
2.0
30
1.5
20
1.0
10
0.5
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Power Derating, Junction-to-Case
0.0
0
25 50 75 100 125 150
TA - Ambient Temperature (°C)
Power Derating, Junction-to-Ambient
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
www.DataSheet4U.com
Document Number: 69024
S-82664-Rev. A, 03-Nov-08
www.vishay.com
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