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PDF MAX5079 Data sheet ( Hoja de datos )
| Número de pieza | MAX5079 | |
| Descripción | ORing MOSFET Controller | |
| Fabricantes | Maxim Integrated Products | |
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19-3584; Rev 0; 2/05
www.DataSheet4U.com
ORing MOSFET Controller with
Ultra-Fast 200ns Turn-Off
General Description
The MAX5079 ORing MOSFET controller replaces
ORing diodes in high-reliability redundant, parallel-con-
nected power supplies. Despite their low forward-volt-
age drop, ORing Schottky diodes cause excessive
power dissipation at high currents. The MAX5079
allows for the use of low-on-resistance n-channel power
MOSFETs to replace the Schottky diodes. This results
in low power dissipation, smaller size, and elimination
of heatsinks in high-power applications.
The MAX5079 operates from 2.75V to 13.2V and includes
a charge pump to drive the high-side n-channel MOSFET.
Operation down to 1V is possible if an auxiliary voltage of
at least 2.75V is available. When the controller detects a
positive voltage difference between IN and BUS, the
n-channel MOSFET is turned on. The MOSFET is turned
off as soon as the MAX5079 sees a negative potential at
IN with respect to the BUS voltage, and is automatically
turned back on when the positive potential is restored.
Under fault conditions, the ORing MOSFET’s gate is
pulled down with a 1A current, providing an ultra-fast
200ns turn-off. The reverse voltage turn-off threshold is
externally adjustable to avoid unintentional turn-off of the
ORing MOSFET due to glitches at IN or BUS caused by
hot plugging the power supply.
Additional features include an OVP flag to facilitate
shutdown of a failed power supply due to an overvolt-
age condition, and a PGOOD signal that indicates if VIN
is either below the undervoltage lockout or VBUS is in
an overvoltage condition. The MAX5079 operates over
the -40°C to +85°C temperature range and is available
in a space-saving 14-pin TSSOP package.
Applications
Paralleled DC-DC Converter Modules
N+1 Redundant Power Systems
Servers
Base-Station Line Cards
RAID
Networking Line Cards
Pin Configuration appears at end of data sheet.
Features
♦ 2.75V to 13.2V Input ORing Voltage
♦ 1V to 13.2V Input ORing Voltage with 2.75V Aux
Voltage Present
♦ 2A MOSFET Gate Pulldown Current During Fault
Condition
♦ Ultra-Fast 200ns, MOSFET Turn-Off During Fault
Condition
♦ Supply Undervoltage and Bus Overvoltage
Detection
♦ Power-Good (PGOOD) and Overvoltage (OVP)
Outputs for Fault Detection
♦ Space-Saving 14-Pin TSSOP Package
♦ -40°C to +85°C Operating Temperature Range
Ordering Information
PART
MAX5079EUD
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
14 TSSOP
Typical Operating Circuit
VOUT1
POWER SUPPLY 1
(PS1)
1V TO 13.2V
SUB 75N 03-04
N1
>2.75V
VIN
IN
AUXIN
GATE BUS
U1 PGOOD
UVLO
STH
MAX5079
OVI
OVP
RSTH CSTH
C+ C- FTH
GND
CEXT RFTH
BUS
VBUS COMMON
VOUT2
POWER SUPPLY 2
(PS2)
1V TO 13.2V
SUB 75N 03-04
N2
>2.75V
VIN
IN
AUXIN
GATE BUS
U2 PGOOD
UVLO
STH
MAX5079
OVI
OVP
RSTH CSTH
C+ C- FTH
GND
RFTH
CEXT
VBUS
CBUS
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
www.DataSheet4U.com
ORing MOSFET Controller with
Ultra-Fast 200ns Turn-Off
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted. See the Typical Operating Circuit.)
SLOW-COMPARATOR BLANKING TIME
tSTH vs. CSTH (RSTH = 180kΩ)
100
90 75mV OVERDRIVE
80
70
60
50
40
30
20
10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
CSTH (µF)
FAST-COMPARATOR REVERSE VOLTAGE
THRESHOLD (VFTH vs. RFTH)
1.5
1.4
1.3
1.2
1.1
TA = +85°C
1.0
0.9 TA = +125°C
0.8
0.7
0.6
0.5
0.4 TA = -40°C
0.3
0.2
0.1
0
0 20 40 60 80 100 120 140
RFTH (kΩ)
FAST-COMPARATOR RESPONSE TIME
80
72 VIN = 1V, VAUXIN = 5V
VIN = 5V, VAUXIN = 0V
64
56
48
40
32
24 VIN = 2.75V,
VAUXIN = 12V
16
VIN = 12V,
VAUXIN = 0V
8
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
CHARGE-PUMP FREQUENCY
vs. INPUT VOLTAGE
80
78
76 TA = +125°C
TA = +85°C
74
72
70
68 TA = +25°C TA = -40°C
66
64
62
60
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
VIN (V)
GATE-CHARGE CURRENT vs. CEXT
6.0
5.5 VIN = 12V
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1 10 100
CEXT (nF)
FAULT CURRENT WAVEFORM
(IN SHORTED TO PGND)
MAX5079 toc09
MOSFET REVERSE
CURRENT
5A/div
BUS
5V/div
400ns/div
VIN = 5V, VBUS = 5V,
VAUXIN = 0V, CSTH = 0,
RSTH = OPEN, RFTH = 0,
UVLO = IN
GATE
10V/div
IN
5V/div
_______________________________________________________________________________________ 5
5 Page 
www.DataSheet4U.com
ORing MOSFET Controller with
Ultra-Fast 200ns Turn-Off
c. During the hot insertion, a voltage spike can occur
at N1 and N2 and cause the (VOUT1 to VBUS) or
(VOUT2 to VBUS) voltage to go negative. If the
reverse voltage is below the fast-comparator
reverse voltage threshold (VFTH) but above the
programmed slow-comparator reverse voltage
threshold (VSTH), the spike is ignored for the pro-
grammed blanking time (tSTH). If the spike is
longer than 50ns (the fast-comparator internal
blanking time, tFBL) and larger than VFTH, then U1
and U2 will turn off N1 and N2 quickly. If the mag-
nitude of the voltage spike is above VSTH but less
than VFTH, and longer than the slow-comparator
blanking time (tSTH), U1 and U2 will turn off their
respective ORing MOSFETs (N1 and N2) by dis-
charging their GATE pins to PGND. The external
load-sharing circuit of PS1 and PS2 will force
VOUT1, VOUT2 above VBUS and N1, N2 will turn
back on through the 2mA current sourcing from
the GATE pins of U1 and U2. To avoid this situa-
tion the user can set the slow-comparator thresh-
old and blanking time depending on the
magnitude and duration of the voltage spikes.
d. PS3 fails to start. VUVLO (U3) threshold is not
crossed and U3 keeps N3 off.
e. PS3 goes into an overvoltage condition (no feed-
back). This causes VBUS to go into an overvoltage
condition increasing the loading on PS3 (provided
PS3 is able to supply all the required BUS cur-
rent). The current-sharing circuit will force the out-
puts of PS1 and PS2 to increase and eventually
saturate at their current-sharing voltage range.
Eventually only PS3 will have a positive voltage at
IN (U3) with respect to BUS. PS1 and PS2 will
have a negative voltage at VOUT1 and VOUT2 with
respect to BUS. All overvoltage inputs OVI (U1),
OVI (U2), and OVI (U3) sense the overvoltage, but
only OVP (U3) is asserted and latched low. GATE
(U3) is pulled to PGND and remains low as long
as VOVI ≥ 0.6V. When VOVI drops below 0.6V,
OVP remains low. However, U3 tries to turn on N3
unless VOUT3 is actively kept below the undervolt-
age lockout. Use OVP (U3) to either drive the
cathode of the optocoupler to shutdown PS3 from
the primary side or use OVP (U3) to fire an SCR
connected between VOUT3 and PGND.
3) PS1, PS2, PS3 are turned on with a shorted BUS.
Body diodes of N1, N2, and N3 conduct and short the
outputs of PS1, PS2, and PS3 to PGND. The power
supplies go into current limit (either in foldback or in
hiccup mode). The MAX5079s remain in undervoltage
lockout and keep all ORing MOSFETs off. The average
current sourced by PS1, PS2, or PS3 must be low
enough so as not to exceed the MOSFETs power dissi-
pation (PD = VF x ISHORT).
a. Use additional n-channel MOSFETs in series with
N1, N2, and N3 in the reverse direction to isolate
the power supplies from a shorted bus (Figure 3).
When power is turned on with a shorted bus, VIN_
(U1, U2, U3) increases and VUVLO rises above
the UVLO threshold. The MAX5079’s GATE out-
puts start charging the back-to-back ORing
MOSFET gates. The short-circuit condition at BUS
collapses VIN (U1), VIN (U2), and VIN (U3) send-
ing the MAX5079s into undervoltage lockout. This
turns off the MAX5079s entirely, including dis-
charging of the charge-pump storage capacitors.
The IN voltages come back up again crossing
UVLO (UVLO has 60mV hysteresis). A new cycle
starts and the time required to charge the charge-
pump capacitor and the turn-on time of the device
serves as a dead time. However, the dead time
may not be enough to reduce the dissipation in
the MOSFETs to an acceptable level. We advise
in keeping the short-circuit current low and pro-
viding hiccup current-limit protection to the power
supplies (PS1, PS2, and PS3).
b. Any other overload condition that would sustain the
IN voltage above UVLO, will keep the MOSFETs ON
continuously. Ensure the MOSFETs’ current
rating is higher than the maximum short-circuit
source current of the power supplies (PS1, PS2,
and PS3) to avoid damage to the ORing MOSFETs.
4) PS1, PS2, and PS3 are present and PS1 is short-
ed to GND.
VOUT1 drops below VBUS. The negative potential from
VIN (U1) to VBUS increases above the fast-comparator
threshold and lasts longer than the 50ns blanking time.
The MAX5079 (U1) takes its power from the voltage at
BUS (U1). Connect BUS close to CBUS, away from N1
so that U1 can receive power from BUS for a few
microseconds until N1 isolates BUS from IN. N1 is dis-
charged with 2A pulldown current, turning off N1 and
isolating PS1 from the BUS. The load-sharing circuit of
PS2 and PS3 will increase PS2 and PS3’s load current
until the total bus current requirement is satisfied.
For VIN (U1) < 2.75V, VAUXIN (U1) must come from an
independent source or remain on for some time (a few
microseconds) after VIN (U1) has failed. This minimum
on-time is needed to discharge the gate of the ORing
MOSFET and isolate PS1 from the BUS.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet MAX5079.PDF ] | |
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