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PDF SM16705P Data sheet ( Hoja de datos )
| Número de pieza | SM16705P | |
| Descripción | 8-BIT CONSTANT CURRENT LED DRIVER | |
| Fabricantes | SamHop Microelectronics Corp. | |
| Logotipo |  |
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SAMHOP Microelectronics Corp.
8-BIT CONSTANT CURRENT LED DRIVER
SM16705P/F/FN
GENERAL DESCRIPTION
FEATURES
The SM16705P/F/FN are specifically designed for
LED display constant current drivers.
This constant current output circuits is able to setup
by external resistor (IOUT = 5 ~ 90mA).
This IC is monolithic integrated circuit designed to be
used together with Bi-CMOS process.
The devices consist of 8bit shift register, latch, AND-
GATE and Constant Current Drivers.
* Constant Current Output :
can setup all output current with one resistor
for 5 to 90mA.
* Maximum Clock Frequency :
fCLK = 25 (MHz)
(Cascade Connect Operate,
Topr = 25oC)
* 5V CMOS Compatible Input
* 16 pin DIP, SOP or SSOP package
* Constant Output Current Matching :
Output-GND
Voltage
≧0.4V
≧0.7V
Current
Matching
± 6.0%
± 6.0%
Output Current
5 ~ 40mA
5 ~ 90mA
PIN ASSIGNMENTS
GND
SERIAL-IN
CLOCK
LATCH
OUT0
OUT1
OUT2
OUT3
1
2
3
4
5
6
7
8
16 VDD
15 R-EXT
14 SERIAL-OUT
13 ENABLE
12 OUT7
11 OUT6
10 OUT5
9 OUT4
SM16705
Part Number
SM16705P
SM16705F
SM16705FN
Package Type
16pin DIP
16pin SOP
16pin SSOP
Page 1
V.2.0 MAY,2003
1 page  
SAMHOP Microelectronics Corp. SM16705P/F/FN
8-BIT CONSTANT CURRENT LED DRIVER
MAXIMUM RATINGS (Ta = 25oC)
Characteristic
Symbol
Rating
Unit
Supply Voltage
Input Voltage
Output Current
Output Voltage
Clock Frequency
GND Terminal Current
Power Dissipation
VDD
VIN
IOUT
VOUT
fCLK
IGND
PD
Thermal Resistance
Operating Termerature
Storage Temperature
Rth (j-a)
Topr
Tstg
0 ~ 7.0
- 0.4 ~ VDD +0.4
90
- 0.5 ~ 20.0
25
720
1.47 (DIP : FREE AIR, Ta = 25oC)
0.78 (SOP/ SSOP : ON PCB, Ta = 25oC)
85 (DIP : FREE AIR, Ta = 25oC)
160 (SOP/ SSOP : ON PCB, Ta = 25oC)
-40 ~ 85
-55 ~ 150
V
V
mA
V
MHz
mA
W
oC / W
oC
oC
(Note)
DIP : Ambient temperature derated above 25oC in the proportion of 11.8mW / oC
SOP/ SSOP: Ambient temperature delated above 25oC in the proportion of 6.3mW / oC
RECOMMENDED OPERATING CONDITION (Ta = -40 ~ 85oC unless otherwise noted)
Characteristic
Symbol
Condition
Supply Voltage
Output Voltage
Output Current
VDD
VOUT
IO
IOH
IOL
－
－
OUTn,DC test circuit
SERIAL-OUT
SERIAL-OUT
Input Voltage
VIH
VIL
－
－
LATCH Pulse Width
CLOCK Pulse Width
ENABLE Pulse Width
Set-up Time for DATA
Hold Time for DATA
Set-up Time for LATCH
Clock Frequency
Power Dissipation
tw LAT
tw CLK
tw EN
tsetup(D)
thold (D)
tsetup(L)
fCLK
PD
VDD = 4.5 ~ 5.5V
Cascade operation
Ta = 85oC(DIP FREE AIR)
Ta = 85oC
(SOP/ SSOP ON PCB)
Min. Typ. Max. Unit
4.5 5.0 5.5 V
－ － 15.0 V
5 － 88
－ － 1.0 mA
－ － -1.0
0.7
VDD
－
VDD
+0.3
V
-0.3
－
0.3
VDD
20 － － ns
20 － － ns
2000 － － ns
20 － － ns
20 － － ns
20 － － ns
－ － 25 MHz
－ － 0.82
－ － 0.40 W
Page 5
V2.0 MAY,2003
5 Page 
SAMHOP Microelectronics Corp. SM16705P/F/FN
8-BIT CONSTANT CURRENT LED DRIVER
[1] Output Current (IOUT)
IOUT is set by the enternal resistor (R-EXT) as shown in Firgure1.
[2] Total supply voltage (VLED)
This device can operate at 0.4~0.7V (VOUT). When a higher voltage is input to the device, the excess
voltage is consumed inside the device, that leads to more power dissipation.
In order to minimize power dissipation and loss, we would like to recommend to set the total supply voltage
as shown below,
VLED (total supply voltage)=VOUT (IC Supply Voltage)+ Vf (LED Forward voltage)
+ VDS (MOSFET Voltage Drop)
When the total supply is too high considering the power dissipation of this device, an additional R can
decrease the supply voltage (VOUT).
PATTERN LAYOUT
VDD
SCAN
CPU
VDD
ENABLE
CLOCK
LATCH
SERIAL-IN
R-EXT
VDD
OUT0
VOUT
OUT7
GND SERIAL-OUT
VLED = 3 ~ 4 (V)
SDM4952
SDM4953
VDS SDM9435A
Vf
ENABLE
CLOCK
LATCH
SERIAL-IN
R-EXT
VDD
VDD
OUT0
VOUT
OUT7
GND SERIAL-OUT
Vf
[3] Pattern Layout
This device has only one ground pin that means signal ground pin and power ground pin are common.
If ground pattern layout contains large inductance and impedance, and the voltage between ground
and LATCH, CLOCK terminals exceeds 2.5V by switching noise during operation, this device may miss-
operate. So we would advise you to pay attention to pattern layout to minimize ground inductance.
Page 11
V.2.0 MAY,2003
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet SM16705P.PDF ] | |
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