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PDF MC74HCT374A Data sheet ( Hoja de datos )
| Número de pieza | MC74HCT374A | |
| Descripción | Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC74HCT374A
Octal 3-State Noninverting
D Flip-Flop with
LSTTL-Compatible Inputs
High−Performance Silicon−Gate CMOS
The MC74HCT374A may be used as a level converter for
interfacing TTL or NMOS outputs to High−Speed CMOS inputs.
The HCT374A is identical in pinout to the LS374.
Data meeting the setup and hold time is clocked to the outputs with
the rising edge of Clock. The Output Enable does not affect the state of
the flip−flops, but when Output Enable is high, the outputs are forced
to the high−impedance state. Thus, data may be stored even when the
outputs are not enabled.
The HCT374A is identical in function to the HCT574A, which has
the input pins on the opposite side of the package from the output pins.
This device is similar in function to the HCT534A, which has
inverting outputs.
Features
• Output Drive Capability: 15 LSTTL Loads
• TTL/NMOS−Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 mA
• In Compliance With the JEDEC Standard No. 7.0 A Requirements
• Chip Complexity: 276 FETs or 69 Equivalent Gates
• Improvements over HCT374
♦ Improved Propagation Delays
♦ 50% Lower Quiescent Power
♦ Improved Input Noise and Latchup Immunity
• These Devices are Pb−Free and are RoHS Compliant
LOGIC DIAGRAM
DATA
INPUTS
D0 3
D1 4
D2 7
D3 8
D4 13
D5 14
D6 17
D7 18
CLOCK 11
2 Q0
5 Q1
6 Q2
9 Q3
12 Q4
15 Q5
16 Q6
19 Q7
NONINVERTING
OUTPUTS
OUTPUT ENABLE 1
PIN 20 = VCC
PIN 10 = GND
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 12
1
http://onsemi.com
SOIC−20
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
PIN ASSIGNMENT
OUTPUT ENABLE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CLOCK
MARKING DIAGRAMS
20 20
HCT374A
AWLYYWWG
HCT
374A
ALYWG
G
1
SOIC−20
1
TSSOP−20
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Output
Output
Enable Clock
D
Q
L
L
L L,H,
HX
HH
LL
X No Change
XZ
X = don’t care
Z = high impedance
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
Publication Order Number:
MC74HCT374A/D
1 page  
CLOCK 11
OUTPUT 1
ENABLE
MC74HCT374A
EXPANDED LOGIC DIAGRAM
D0
3
DQ
D1
4
DQ
D2
7
DQ
D3
8
DQ
D4
13
DQ
D5
14
DQ
D6
17
DQ
D7
18
DQ
CCCCCCCC
2 5 6 9 12 15 16 19
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
ORDERING INFORMATION
Device
Package
Shipping†
MC74HCT374ADWG
SOIC−20
(Pb−Free)
38 Units / Rail
MC74HCT374ADWR2G
SOIC−20
(Pb−Free)
1000 Units / Reel
MC74HCT374ADTR2G
TSSOP−20
(Pb−Free)
2500 Units / Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC74HCT374A.PDF ] | |
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