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PDF MC100EP16VT Data sheet ( Hoja de datos )
| Número de pieza | MC100EP16VT | |
| Descripción | 3.3V / 5V ECL Differential Receiver/Driver | |
| Fabricantes | ON Semiconductor | |
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MC100EP16VT
3.3 V / 5 V ECL Differential
Receiver/Driver with
Variable Output Swing and
Internal Input Termination
Description
The MC100EP16VT is a differential receiver functionally equivalent
to the 100EP16 with input pins controlling the amplitude of the outputs
(pin 1) and providing an internal termination network (pin 4).
The VCTRL input pin controls the output amplitude of the EP16VT
and is referenced to VCC. (See Figure 4.) The operational range of the
VCTRL input is from ≤ VBB (a supply at VCC−1.42 V, maximum output
amplitude) to VCC (minimum output amplitude). VBB is an externally
supplied voltage equal to VCC−1.42 V (See Figures 2 and Figure 3). A
variable resistor between VCC and VBB, with the wiper driving
VCTRL, can control the output amplitude. Typical application circuits
and a VCTRL Voltage vs. Output Amplitude graph are described in this
data sheet. When left open, the VCTRL pin will be internally pulled
down to VEE and operate as a standard EP16, with 100% output
amplitude.
The VTT input pin offers an internal termination network for a 50 W
line impedance environment, shown in Figure 1. For further reference,
see Application Note AND8020, Termination of ECL Logic Devices.
Input considerations are required for D and D under no signal conditions
to prevent instability.
Special considerations are required for differential inputs under No
Signal conditions to prevent instability.
Features
• 220 ps Propagation Delay
• Maximum Frequency > 4 GHz Typical (See Graph)
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range:
♦ VCC = 3.0 V to 5.5 V with VEE = 0 V
• NECL Mode Operating Range:
♦ VCC = 0 V with VEE = −3.0 V to −5.5 V
• Open Input Default State
• 50 W Internal Termination Resistor
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
© Semiconductor Components Industries, LLC, 2016
August, 2016 − Rev. 5
1
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8
1
SOIC−8 NB
D SUFFIX
CASE
751−07
8
1
TSSOP−8
DT SUFFIX
CASE
948R−02
DFN−8
MN SUFFIX
CASE 506AA
MARKING DIAGRAMS*
8
KEP63
ALYW
G
1
8
KP63
ALYWG
G
1
14
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package Shipping†
MC100EP16VTDG
SOIC−8 NB
(Pb-Free)
98 Units/Tube
MC100EP16VTDR2G SOIC−8 NB 2500/Tape & Reel
(Pb-Free)
MC100EP16VTDTG
TSSOP−8
(Pb-Free)
100 Units/Tube
MC100EP16VTDTR2G TSSOP−8 2500/Tape & Reel
(Pb-Free)
MC100EP16VTMNR4G DFN−8 1000/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
MC100EP16VT/D
1 page  
MC100EP16VT
Table 6. DC CHARACTERISTICS, NECL (VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 1))
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current
30 36 42 31 38 44 32 40 48 mA
VOH
Output HIGH Voltage (Note 2)
VCC > VCTRL > VEE
−1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV
VOL Output LOW Voltage (Max Swing) (Note 2)
mV
VCTRL ≤ VBB
−1945 −1810 −1695 −1945 −1780 −1695 −1945 −1780 −1695
VCC ≥ VCTRL > VBB
See
Fig.2
See
Fig.2
See
Fig.2
VIH
VIL
VCTRL
VIHCMR
VCTRL = VCC (Min Swing)
D, D Input HIGH Voltage (Single-Ended)
D, D Input LOW Voltage (Single-Ended)
Input Voltage (VCTRL)
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 3)
−1195 −1070 −945 −1205 −1080 −955 −1235 −1110
−1225
−880 −1225
−880 −1225
−1945
−1625 −1945
−1625 −1945
VEE
VEE+2.0
VCC
−0.4
VEE
VEE+2.0
VCC
−0.4
VEE
VEE+2.0
−985
−880
−1625
VCC
−0.4
mV
mV
mV
V
IIH Input HIGH Current
(VTT Open)
IIL Input LOW Current
(VTT Open)
−150
150
−150
150
−150
150 mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC.
2. All loading with 50 W to VCC − 2.0 V. VOH does not change with VCTRL. VOL changes with VCTRL. VCTRL is referenced to VCC.
3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 7. AC CHARACTERISTICS (VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 1))
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ
fmax
tPLH,
tPHL
Maximum Toggle Frequency
(See Figure 8. Fmax/JITTER)
Propagation Delay to Output Differential
Max Swing
Min Swing
>4 >4 >4
250 300 350 250 300 350 250 300
200 250 300 200 250 300 200 250
tSKEW
tJITTER
VPP
Duty Cycle Skew (Note 2)
Cycle-to-Cycle Jitter
(See Figure 8. Fmax/JITTER)
Input Voltage Swing
(Differential Configuration) (Note 3)
5.0 20
0.2 < 1
5.0 20
0.2 < 1
5.0
0.2
150 800 1200 150 800 1200 150 800
tr, tf Output Rise/Fall Times
Max Swing Q (20% − 80%)
Min Swing
70 120 170 80 130 180 100 150
30 80 130 20 70 120 20 70
Max
350
300
20
<1
1200
200
120
Unit
GHz
ps
ps
ps
mV
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
2. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
3. VPP(min) is minimum input swing for which AC parameters are guaranteed.
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5
5 Page 
MC100EP16VT
PACKAGE DIMENSIONS
TSSOP−8
CASE 948R−02
ISSUE A
0.15 (0.006) T U S
2X L/2
L
PIN 1
IDENT
0.15 (0.006) T U S
8x K REF
0.10 (0.004) M T U S V S
85
B
1
−U−
4
A
−V−
0.25 (0.010)
M
F
DETAIL E
0.10 (0.004)
−T− SEATING
PLANE
D
C
G
DETAIL E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE -W-.
−W−
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 2.90 3.10 0.114 0.122
B 2.90 3.10 0.114 0.122
C 0.80 1.10 0.031 0.043
D 0.05 0.15 0.002 0.006
F 0.40 0.70 0.016 0.028
G 0.65 BSC
0.026 BSC
K 0.25 0.40 0.010 0.016
L 4.90 BSC
0.193 BSC
M 0_ 6 _ 0_ 6_
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11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MC100EP16VT.PDF ] | |
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