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PDF MLX83100 Data sheet ( Hoja de datos )

Número de pieza MLX83100
Descripción Automotive 2-Phase DC Pre-Driver
Fabricantes Melexis 
Logotipo Melexis Logotipo



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MLX83100 Automotive 2-Phase DC Pre-Driver
Datasheet
1. Features and Benefits
2-phase DC gate driver
Level shifting between MCU PWM
outputs and 2 external half-bridges
Compatible with 3.3V-5V microcontrollers
Supported supply voltage range
Absolute maximum rating: 45V
Operating range: 4.5V-28V
12V-28V Battery systems
Automotive qualified for 12V
Sleep mode with current <30µA
Two charge pump configuration modes for
Low voltage operation
Reverse polarity N-FET protection
High-side gate drivers with bootstrap circuits
Integrated 12V voltage regulator
Supports 6x 350nC N-FETs at 20kHz PWM
Supports 100% PWM operation
Integrated current sense amplifier
Low offset and low offset drift
Fast settling time < 1µs
Programmable gain: 8x-48x
Extensive diagnostics
Under/over voltage detection
Over temperature warning
Programmable VDS monitoring
VGS monitoring
Serial, PWM diagnostics interface
Configurable diagnostics
Full diagnostic feedback
Customer configurable EEPROM
Driver configuration
Diagnostics configuration
Small package
28-pin TSSOP-EP, AEC-Q100 grade 0
qualification (TJ=175˚C)
2. Application Examples
Automotive 12V DC applications
Water pump / Oil pump / Fuel pump
Engine Cooling fan
HVAC blower / compressor
Wiper
Sunroof
EPS
Industrial DC motor drivers up to 28V
Pumps
Fans
Blowers
Compressors
3. Ordering Information
Product
MLX83100
Temperature
L(-40°C to 150°C)
Package
GO (TSSOP28-EP 4.4x9.8mm)
Ordering Example: “MLX83100LGO-DBA-000-RE”.
Option Code Packing Form
DBA-000
RE (Reel)

1 page




MLX83100 pdf
MLX83100 Automotive 2-Phase DC Pre-Driver
Datasheet
7. Pin Configuration & Definition
7.1. Pin Configuration
Figure 7-1 Pin configuration
REVISION 5.1 DECEMBER 13, 2016
Page 5 of 41

5 Page





MLX83100 arduino
MLX83100 Automotive 2-Phase DC Pre-Driver
Datasheet
Gate Drivers
No.45 Rise time
No.46 Fall time
Pull-up ON resistance
low-side pre-driver
No.47
Pull-up ON resistance
high-side pre-driver
tr
CLOAD = 1nF, 20% to 80%
6
7 15 ns
tf
CLOAD = 1nF, 80% to 20%
4
7 15 ns
RON_UP
VSUP > 7V
-10mA, TJ = -40C
-10mA, TJ = 175C
10 - 30 Ohm
15 - 30 Ohm
Pull-down ON resistance
low-side pre-driver
No.48
Pull-down ON resistance
high-side pre-driver
RON_DN
VSUP > 7V
10mA, TJ = -40C
10mA, TJ = 175C
10 - 30 Ohm
15 - 30 Ohm
No.49
Turn-on gate
peak current
drive
(sourcing)
IGON
VGS = 0V, VSUP > 7V
-
-1.4
(-0.45)
A
No.50
Turn-off gate
peak current
drive
(sinking)
IGOFF VGS = 12V, VSUP > 7V
-
1.6
(0.45)
A
No.51 Propagation delay
tPDDRV
From logic input
threshold to 2V VGS drive
output at no load
20
- 1201 ns
Transitions at the
No.52 Propagation delay matching tPDDRVM
different phases at no
-20
-
20 ns
load condition
Programmable dead time :
asynchronous internal delay
No.53 between high-side and low-
side pre-driver of one half
bridge
tDEAD
DEAD_TIME [ 2:0] = 000
0.00
001 0.51
010 0.80
011
100
-25%
1.10
1.67
+25%
µs
101 2.30
110 3.40
111 6.90
No.54 Dead time matching
between different channels
tDEAD_TOL
-15 - 15 %
1 For bare it is specified to 200ns max due measurement accuracy at wafer level
REVISION 5.1 DECEMBER 13, 2016
Page 11 of 41

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