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PDF CPC7583BA Data sheet ( Hoja de datos )
| Número de pieza | CPC7583BA | |
| Descripción | Line Card Access Switch | |
| Fabricantes | Clare Inc. | |
| Logotipo |  |
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CPC7583
Line Card Access Switch
Features
• Small 28 pin surface mount SOIC package
• Monolithic IC reliability
• Low matched RDSON
• Eliminates the need for zero cross switching
• Flexible switch timing to transition from ringing mode to
idle/talk mode
• Clean, bounce free switching
• Tertiary protection consisting of integrated current
limiting, thermal shutdown and SLIC protection
• 5V operation with power consumption <10mW
• Intelligent battery monitor
• Latched logic level inputs, no drive circuitry
• Pin to pin compatible to the Lucent 7583 family
Description
The CPC7583 is a monolithic solid state switch in a 28 pin
surface mount SOIC package. It provides the necessary
functions to replace three 2-Form-C electromechanical re-
lays on analog line cards found in Central Office, Access
and PBX equipment. The device contains solid state
switches for tip and ring line break, ring injection/ring re-
turn, line test access, test in access and ringing generator
testing. The CPC7583 requires only a +5V supply and of-
fers “break-before-make” or “make-before-break” switch
operation using simple logic level input control. The
CPC7583 has 4 versions. The CPC7583BA and the
CPC7583BC contain the integrated protection SCR while
the CPC7583BC and the CPC7583BD contain an extra
logic state which is detailed in later sections.
Applications
• Central office (CO)
• Digital Loop Carrier (DLC)
• PBX Systems
• Digitally Added Main Line (DAML)
• Hybrid Fiber Coax (HFC)
• Fiber in the Loop (FITL)
• Pair Gain System
• Channel Banks
Ordering Information
Part #
Description
CPC7583BA 10 Pole with protection SCR
CPC7583BB 10 Pole without protection SCR
CPC7583BC 10 Pole extra logic state with
protection SCR
CPC7583BD 10 Pole extra logic state without
protection SCR
CPC7583BATR Tape and Reel Version
CPC7583BBTR Tape and Reel Version
CPC7583BCTR Tape and Reel Version
CPC7583BDTR Tape and Reel Version
Block Diagram
TIP
Ring
DS-CPC7583-RE
TTESTout (10)
TRING(8)
TTESTin(5)
Ringing Test Return
SW7
R1
TLINE (7)
SW5
Test Out
SW3
Ringing
Return
SW9
Test In
SW1 Break
Secondary
Protection
VRBeAfTerence (28)
TBAT (6)
STRCIRP aCnirdcuit
SLIC
R2 RLINE (22)
Break SW2
SW6
Test Out
SW4
Ringing
Access
SW10
Test In
RBAT (23)
SW8
Ringing Test
CPC7583BA
RTESTout(19)
RRING(20)
Ring Generator
Battery
RTESTin (24)
www.clare.com
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1 page  
CPC7583
Table 6. Ringing Test Switch SW8
PARAMETERS
CONDITIONS
Off-state Leakage Current:
+25oC
+85oC
-40oC
Vsw (differential)= -60V to +175V
Vsw (differential)= +60V to -175V
Vsw (differential)= -60V to +175V
Vsw (differential)= +60V to -175V
Vsw (differential)= -60V to +175V
Vsw (differential)= +60V to -175V
ON-resistance
Isw (on) = +/-70 mA, +/-80mA
ON- voltage
Isw (on) = +/-1mA
Release Current
-
Logic Input to Switch Output Isolation:
+25oC
Vsw (RRING, RTESTin) = +/-320V
Logic Inputs = Gnd
+85oC
Vsw (RRING, RTESTin) = +/-330V
Logic Inputs = Gnd
-40oC
Vsw (RRING, RTESTin) = +/-310V
Logic Inputs = Gnd
SYMBOL MIN TYP MAX UNITS
Isw - .05 1 µA
Isw - 0.1 1 µA
Isw - .05 1 µA
∆ V - 6 20 Ω
- - 0.75 1.5 V
- - 450 - µA
Isw - .05 1 µA
Isw - 0.1 1 µA
Isw - .05 1 µA
* Choice of secondary protector and series current-limit resistor should ensure these ratings are not exceeded.
Table 7. Test in Switches, SW9 and SW10
PARAMETERS
CONDITIONS
SYMBOL MIN TYP MAX UNITS
Off-state Leakage Current:
+25oC
Vsw (differential)= -320V to Gnd
Vsw (differential)= -60V to +260V
+85oC
Vsw (differential)= -330V to Gnd
Vsw (differential)= -60V to +270V
-40oC
Vsw (differential)= -310V to Gnd
Vsw (differential)= -60V to +250V
Isw
Isw
Isw
- 0.1 1
- 0.3 1
- 0.1 1
µA
µA
µA
RDSON:
+25oC
+85oC
-40oC
Isw(on) = +/-5 mA, +/-10mA
Isw(on) = +/-5 mA, +/-10mA
Isw(on) = +/-5 mA, +/-10mA
∆V
- 35
-
Ω
∆V
- 50 70
Ω
∆V
- 26
-
Ω
DC Current Limit:
+25oC
+85oC
-40oC
Vsw (On) = +/-10V
Vsw (On) = +/-10V
Vsw (On) = +/-10V
Isw
- 160
-
mA
Isw
80 110
-
mA
Isw - 210 250 mA
Logic Input to Switch Output Isolation:
+25oC
Vsw (TTESTin, RTESTin) = +/-320V
Logic Inputs = Gnd
+85oC
Vsw (TTESTin, RTESTin) = +/-330V
Logic Inputs = Gnd
-40oC
Vsw (TTESTin, RTESTin) = +/-310V
Logic Inputs = Gnd
Isw
- 0.1 1
µA
Isw
- 0.3 1
µA
Isw
- 0.1 1
µA
Rev. E www.clare.com
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5 Page 
CPC7583
Functional Description
Introduction
The CPC7583 has eight distinct states. Please consult the
truth tables in table 12 and 13 for version differences.
• Idle/talk state (line break switches SW1, and SW2
closed). All other switches open.
• Ringing state, (ringing switches SW3, SW4 closed).
All other switches open.
• Loop access (loop access switches SW5, SW6
closed). All other switches open.
• Ring generator test state (SW7, SW8 closed). All
other switches open.
• SLIC test state Testin switches closed (SW9, SW10).
• Simultaneous Loop and SLIC access state. (SW9,
SW10, SW5 and SW6 closed). All other switches open.
• Simultaneous test out and ring test (SW5, SW6,
SW7, SW8 closed). All other switches open on the “BC”
abd “BD” version.
• All Off state (all switches open).
The CPC7583 offers break-before-make and make-before-
break switching with simple logic level input control. Solid
state switch construction means no impulse noise is gen-
erated when switching during ring cadence or ring trip, thus
eliminating the need for external “zero cross” switching cir-
cuitry. State control is via logic level input so no additional
driver circuitry is required. The line break switches SW1
and SW2 are linear switches that have exceptionally low
RDSON and excellent matching characteristics. The ring-
ing access switch SW4 has a breakdown voltage rating of
>480V which is sufficiently high, with proper protection, to
prevent breakdown in the presence of a transient fault con-
dition. (i.e., passing the transient on to the ring generator)
Integrated into the CPC7583 is a diode bridge clamping
circuit, current limiting and thermal shutdown mechanism
to provide protection to the SLIC device during a fault con-
dition. Positive and negative surges are reduced by the
current limiting circuitry and steered to ground via diodes.
Power cross transients are also reduced by the current lim-
iting and thermal shutdown circuits.
To protect the CPC7583 from an overvoltage fault condi-
tion, use of a secondary protector is required. The sec-
ondary protector must limit the voltage seen at the tip and
ring terminals to a level below the max breakdown volt-
age of the switches. To minimize the stress on the solid-
state contacts, use of a foldback or crowbar type sec-
ondary protector is recommended. With proper selection
of the secondary protector, a line card using the CPC7583
will meet all relevant ITU, LSSGR, FCC or UL protection
requirements.
The CPC7583 operates from a +5V supply only. This gives
the device extremely low idle and active power dissipation
and allows use with virtually any range of battery voltage.
A battery voltage is also used by the CP7583 as a refer-
ence for the integrated protection circuit. In the event of a
loss of battery voltage, the CPC7583 will enter an “all off”
state.
Switch Timing
The CPC7583 provides, when switching from the ringing
state to the idle/talk state, the ability to control the timing
when the ringing access switches SW3 and SW4 are re-
leased relative to the state of the line break switches SW1
and SW2 using simple logic level input. This is referred to
as a “make before break” or “break before make” opera-
tion. When the line break switch contacts (SW1, SW2) are
closed (or made) before the ringing access switch contact
(SW3, SW4) is opened (or broken), this is referred to a
‘make-before-break’ operation. Break-before-make opera-
tion occurs when the ringing access contact (SW3, SW4)
is opened (broken) before the line break switch contacts
(SW1, SW2) are closed (made). With the CPC7583 the
“make before break” and “break before make” operations
can easily be selected by applying logic level inputs to
INTESTout, INRING and INTESTin of the device.
The logic sequences for either mode of operation are given
in Tables 9 and 10. Logic states and explanations are given
in Tables 12 and 13.
Break-before make operation can also be achieved using
pin 13 (TSD) as an input. In table 10 lines 2 and 3 it is
possible to induce the switches to “all off” by grounding pin
13 (TSD) instead of apply logic input to the pins. This has
the effect of overriding the logic inputs and forcing the de-
vice to the “all off” state. Hold this input state for 25ms.
During this hold period, toggle the inputs from the ringing
state to the idle/talk state. After the 25ms release pin 13
(TSD) to return the switch control to the input INTESTout, INRING,
INTESTin and reset the device to the idle/talk state.
Setting pin 13 (TSD) to +5V will allow switch control using
the logic inputs. This setting, however, will also disable the
thermal shutdown circuit and is therefore not recommended.
When using logic controls via the input pins (INTESTout, INRING
and INTESTin), pin 13 (TSD) should be allowed to float. As a
result the two recommended states when using pin 13
Rev. E www.clare.com
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11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CPC7583BA.PDF ] | |
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