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Vishay |
2N3958
Vishay Siliconix
Monolithic N-Channel JFET Dual
PRODUCT SUMMARY
VGS(off) (V) V(BR)GSS Min (V) gfs Min (mS)
–1.0 to –4.5
–50
1
IG Max (pA)
–50
jVGS1 – VGS2j Max (mV)
25
FEATURES
D Monolithic Design
D High Slew Rate
D Low Offset/Drift Voltage
D Low Gate Leakage: 5 pA
D Low Noise: 9 nV⁄√Hz
D High CMRR: 100 dB
BENEFITS
D Tight Differential Match vs. Current
D Improved Op Amp Speed, Settling Time
Accuracy
D Minimum Input Error/Trimming Requirement
D Insignificant Signal Loss/Error Voltage
D High System Sensitivity
D Minimum Error with Large Input Signal
APPLICATIONS
D Wideband Differential Amps
D High-Speed,
Temp-Compensated,
Single-Ended Input Amps
D High Speed Comparators
D Impedance Converters
DESCRIPTION
The low cost 2N3958 JFET dual is designed for
high-performance differential amplification for a wide range of
precision test instrumentation applications. This series
features tightly matched specs, low gate leakage for accuracy,
and wide dynamic range with IG guaranteed at VDG = 20 V.
The hermetically-sealed TO-71 package is available with full
military processing (see Military Information and the
2N5545/5546/5547JANTX/JANTXV data sheet).
For similar products see 2N5196/5197/5198/5199, the
low-noise U/SST401 series, the high-gain 2N5911/5912, and
the low-leakage U421/423 data sheets.
TO-71
S1
1
D1 2
G2
6
5 D2
3
G1
4
Top View
S2
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Lead Temperature (1/16” from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300 _C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 200_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
Document Number: 70256
S-04031—Rev. B, 04-Jun-01
Power Dissipation :
Per Sidea . . . . . . . . . . . . . . . . . . . . . . . . 250 mW
Totalb . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
Notes
a. Derate 2 mW/_C above 85_C
b. Derate 4 mW/_C above 85_C
www.vishay.com
8-1
2N3958
Vishay Siliconix
SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED)
Parameter
Static
Gate-Source Breakdown Voltage
Gate-Source Cutoff Voltage
Saturation Drain Currentb
Gate Reverse Current
Gate Operating Current
Gate-Source Voltage
Gate-Source Forward Voltage
Dynamic
Common-Source
Forward Transconductance
Common-Source Output Conductance
Common-Source Input Capacitance
Common-Source
Reverse Transfer Capacitance
Drain-Gate Capacitance
Equivalent Input Noise Voltage
Noise Figure
Matching
Symbol
V(BR)GSS
VGS(off)
IDSS
IGSS
IG
VGS
VGS(F)
gfs
gos
Ciss
Crss
Cdg
en
NF
Test Conditions
IG = –1 mA, VDS = 0 V
VDS = 20 V, ID = 1 nA
VDS = 20 V, VGS = 0 V
VGS = –30 V, VDS = 0 V
TA = 150_C
VDG = 20 V, ID = 200 mA
TA =125_C
VDG = 20 V, ID = 200 mA
ID = 50 mA
IG = 1 mA, VDS = 0 V
VDS = 20 V, VGS = 0 V
f = 1 kHz
VDS = 20 V, VGS = 0 V
f = 1 MHz
VDG = 10 V, IS = 0 , f = 1 MHz
VDS = 20 V, VGS = 0 V, f = 1 kHz
VDS = 20 V, VGS = 0 V
f = 100 Hz, RG = 10 MW
Differential Gate-Source Voltage
Gate-Source Voltage Differential Change with
Temperature
|VGS1–VGS2|
D|VGS1–VGS2|
DT
VDG = 20 V, ID = 200 mA
VDG = 20 V, ID = 200 mA
TA = –55 to 125_C
Saturation Drain Current Ratio
Transconductance Ratio
Differential Output Conductance
IDSS1
IDSS2
gfs1
gfs2
|gos1–gos2|
VDS = 20 V, VGS = 0 V
VDS = 20 V, ID = 200 mA
f = 1 kHz
Differential Gate Current
|IG1–IG2|
VDG = 20 V, ID = 200 mA
TA = 125_C
Common Mode Rejection Ratioc
CMRR
VDG = 10 to 20 V, ID = 200 mA
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
b. Pulse test: PW v300 ms duty cycle v3%.
c. This parameter not registered with JEDEC.
Limits
Min Typa Max
Unit
–50
–1.0
0.5
–0.5
–57
–2
3
–10
–20
–5
–0.8
–1.5
–4.5
5
–100
–500
–50
–250
–4
–4.2
2
V
mA
pA
nA
pA
nA
V
1 2.5 3
mS
2 35 mS
34
1 1.2 pF
1.5
9
nV⁄
√Hz
0.5 dB
15 25
mV
20 100 mV/_C
0.85
0.97
1
0.85
0.97
0.1
0.1
100
1
10
mS
nA
dB
NQP
www.vishay.com
8-2
Document Number: 70256
S-04031—Rev. B, 04-Jun-01
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