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PDF LM94 Data sheet ( Hoja de datos )
| Número de pieza | LM94 | |
| Descripción | TruTherm Hardware Monitor with PI Loop Fan Control for Server Management | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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April 2006
www.DataSheet4U.com
LM94
TruTherm™ Hardware Monitor with PI Loop Fan Control
for Server Management
1.0 General Description
The LM94 hardware monitor has a two wire digital interface
compatible with SMBus 2.0. Using a Σ∆ ADC, the LM94
measures the temperature of four remote diode connected
transistors as well as its own die and 16 power supply
voltages. The LM94 has new TruTherm technology that sup-
ports precision thermal diode measurements of processors
on sub-micron processes.
To set fan speed, the LM94 has two PWM outputs that are
each controlled by up to six temperature zones. The fan-
control algorithm can be based on a lookup table, PI
(proportional/integral) control loop, or a combination of both.
The LM94 includes digital filters that can be invoked to
smooth temperature readings for better control of fan speed
such that acoustical noise is minimized. The LM94 has four
tachometer inputs to measure fan speed. Limit and status
registers for all measured values are included.
The LM94 builds upon the functionality of previous mother-
board server management ASICs, such as the LM93. It also
adds measurement and control support for dynamic Vccp
monitoring for VRD10/11 and PROCHOT. It is designed to
monitor a dual processor Xeon class motherboard with a
minimum of external components.
2.0 Features
n 8-bit Σ∆ ADC
n Monitors 16 power supplies
n Monitors 4 remote thermal diodes and 2 LM60
n New TruTherm technology support for precision thermal
diode measurements
n Internal ambient temperature sensing
n Programmable autonomous fan control based on
temperature readings with fan boost support
n Fan boost support on tachometer limit error event
n Fan control based on 13-step lookup table or PI Control
Loop or combination of both
n PI fan control loop supports Tcontrol
n Temperature reading digital filters
n 0.5˚C digital temperature sensor resolution
n 0.0625˚C filtered temperature resolution for fan control
n 2 PWM fan speed control outputs
n 4 fan tachometer inputs
n Dual processor thermal throttling (PROCHOT)
monitoring
n Dual dynamic VID monitoring (6/7 VIDs per processor)
supports VRD10.2/11
n 8 general purpose I/Os:
— 4 can be configured as fan tachometer inputs
— 2 can be configured to connect to processor
THERMTRIP
— 2 are standard GPIOs that could be used to monitor
IERR signal
n 2 general purpose inputs that can be used to monitor
the 7th VID signal for VRD11
n Limit register comparisons of all monitored values
n 2-wire serial digital interface, SMBus 2.0 compliant
— Supports byte/block read and write
— Selectable slave address (tri-level pin selects 1 of 3
possible addresses)
— ALERT output supports interrupt or comparator
modes
n 2.5V reference voltage output
n 56-pin TSSOP package
n XOR-tree test mode
3.0 Key Specifications
n Voltage Measurement Accuracy
n Temperature Resolution
n Temperature Sensor Accuracy
n Temperature Range:
— LM94 Operational
— Remote Temp Accuracy
n Power Supply Voltage
n Power Supply Current
±2% FS (max)
9-bits, 0.5˚C
±2.5 ˚C (max)
0˚C to +85˚C
0˚C to +125˚C
+3.0V to +3.6V
1.6 mA
4.0 Applications
n Servers
n Workstations
n Multi-processor based equipment
5.0 Ordering Information
Order Number NS Package Number Transport media
LM94CIMT MTD56
34 units in rail
LM94CIMTX MTD56
1000 units in tape-and-reel
I2C is a registered trademark of the Philips Corporation.
© 2006 National Semiconductor Corporation DS201124
www.national.com
1 page  
9.0 Pin Descriptions
Symbol
GPIO_0/TACH1
GPIO_1/TACH2
GPIO_2/TACH3
GPIO_3/TACH4
GPIO_4 /
P1_THERMTRIP
Pin #
1
2
3
4
5
Type
Digital I/O
(Open-Drain)
Digital I/O
(Open-Drain)
Digital I/O
(Open-Drain)
Digital I/O
(Open-Drain)
Digital I/O
(Open-Drain)
GPIO_5 /
P2_THERMTRIP
6
Digital I/O
(Open-Drain)
GPIO_6
7 Digital I/O
(Open-Drain)
GPIO_7
8 Digital I/O
(Open-Drain)
VRD1_HOT
9 Digital Input
VRD2_HOT
10 Digital Input
P2_VID6/GPI8
11 Digital Input
P1_VID6/GPI9
12 Digital Input
SMBDAT
SMBCLK
ALERT/XtestOut
13
14
15
Digital I/O
(Open-Drain)
Digital Input
Digital Output
(Open-Drain)
RESET
16 Digital I/O
(Open-Drain)
AGND
17 GROUND Input
VREF
18 Analog Output
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Function
Can be configured as fan tach input or a general purpose
open-drain digital I/O.
Can be configured as fan tach input or a general purpose
open-drain digital I/O.
Can be configured as fan tach input or a general purpose
open-drain digital I/O.
Can be configured as fan tach input or a general purpose
open-drain digital I/O..
A general purpose open-drain digital I/O. Can be configured to
monitor a CPU’s THERMTRIP signal to mask other errors. Supports
TTL input logic levels and AGTL compatible input logic levels.
A general purpose open-drain digital I/O. Can be configured to
monitor a CPU’s THERMTRIP signal to mask other errors. Supports
TTL input logic levels and AGTL compatible input logic levels.
Can be used to detect the state of CPU1 IERR or a general purpose
open-drain digital I/O. Supports TTL input logic levels and AGTL
compatible input logic levels.
Can be used to detect the state of CPU2 IERR or a general purpose
open-drain digital I/O. Supports TTL input logic levels and AGTL
compatible input logic levels.
CPU1 voltage regulator HOT. Supports TTL input logic levels and
AGTL compatible input logic levels.
CPU2 voltage regulator HOT. Supports TTL input logic levels and
AGTL compatible input logic levels.
CPU2 VID6 input. Could also be used as a general purpose input to
trigger an error event. Supports TTL input logic levels and AGTL
compatible input logic levels.
CPU1 VID6 input. Could also be used as a general purpose input to
trigger an error event. Supports TTL input logic levels and AGTL
compatible input logic levels.
Bidirectional System Management Bus Data. Output configured as
5V tolerant open-drain. SMBus 2.0 compliant.
System Management Bus Clock. Driven by an open-drain output,
and is 5V tolerant. SMBus 2.0 Compliant.
Open-drain ALERT output used in an interrupt driven system to
signal that an error event has occurred. Masked error events do not
activate the ALERT output. When in XOR tree test mode, functions
as XOR Tree output.
Open-drain reset output when power is first applied to the LM94.
Used as a reset for devices powered by 3.3V stand-by. After reset,
this pin becomes a reset input. If this pin is not used, connection to
an external resistive pull-up is required to prevent LM94 malfunction.
Analog Ground. Digital ground and analog ground need to be tied
together at the chip then both taken to a low noise system ground.
A voltage difference between analog and digital ground may cause
erroneous results.
2.5V used for external ADC reference, or as a VREF reference
voltage
5 www.national.com
5 Page 
13.0 Registers (Continued)
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Lock
Register Name
Address
Description
EXTENDED RESOLUTION TEMPERATURE VALUE REGISTERS
Z2b_LSB
16h Zone 2b (CPU2) extended resolution unfiltered temperature
value register, least-significant-byte
Z2b_MSB
17h Zone 2b (CPU2) extended resolution unfiltered temperature
value register, most-significant byte
Z1a_F_LSB
18h Zone 1a (CPU1) extended resolution filtered temperature value
register, least-significant byte
Z1a_F_MSB
19h Zone 1a (CPU1) extended resolution filtered temperature value
register, most-significant byte
Z1b_F_LSB
1Ah Zone 1b (CPU1) extended resolution filtered temperature value
register, least-significant-byte
Z1b_F_MSB
1Bh Zone 1b (CPU1) extended resolution filtered temperature value
register, most-significant byte
Z2a_F_LSB
1Ch Zone 2a (CPU2) extended resolution filtered temperature value
register, least-significant-byte
Z2a_F_MSB
1Dh Zone 2a (CPU2) extended resolution filtered temperature value
register, most-significant byte
Z2b_F_LSB
1Eh Zone 2b (CPU2) extended resolution filtered temperature value
register, least-significant-byte
Z2b_F_MSB
1Fh Zone 2b (CPU2) extended resolution filtered temperature value
register, most-significant byte
Z3_LSB
20h Zone 3 (Internal) extended resolution temperature value
register, least-significant byte
Z3_MSB
21h Zone 3 (Internal) extended resolution temperature value
register, least-significant byte
Z4_LSB
22h Zone 4 (External Digital) extended resolution temperature value
register, most-significant byte
Z4_MSB
23h Zone 4 (External Digital) extended resolution temperature value
register, least-significant byte
Reserved
24h-30h
PI LOOP AND FAN CONTROL SETUP REGISTERS
x Temperature Source Select
31h
x PWM Filter Settings
32h
x PWM1 Filter Shutoff Threshold
x PWM2 Filter Shutoff Threshold
x PI/LUT Fan Control Bindings
x PI Controller Minimum PWM and
Hysteresis
x Zone 1 Tcontrol
x Zone 2 Tcontrol
x Zone 1 Toff
x Zone 2 Toff
x P Coefficient
x I Coefficient
x PI Exponents
DEVICE IDENTIFICATION REGISTERS
Manufacturer ID
33h
34h
35h
36h
37h
38h
39h
3Ah
3Bh
3Ch
3Dh
3Eh
Selects the temperature source for some temperature zones.
Sets the IIR filter coefficients for the PWM outputs for low
resolution sources
PWM1 Filter Shutoff Threshold
PWM2 Filter Shutoff Threshold
PI/LUT fan control binding configuration
PI Controller Minimum PWM and Hysteresis settings
Zone 1 (CPU1) PI Controller Target Temperature (Tcontrol)
Zone 2 (CPU2) PI Controller Target Temperature (Tcontrol)
Zone 1 (CPU1) PI Controller Off Temperature (Toff)
Zone 2 (CPU2) PI Controller Off Temperature (Toff)
PI controller proportional coefficient
PI controller integral coefficient
PI controller coefficient exponents
Contains manufacturer ID code
11 www.national.com
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LM94.PDF ] | |
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