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PDF AK4644 Data sheet ( Hoja de datos )
| Número de pieza | AK4644 | |
| Descripción | Stereo CODEC | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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ASAHI KASEI
www.DataSheet4U.com
[AK4644]
AK4644
Stereo CODEC with MIC/HP/RCV-AMP
GENERAL DESCRIPTION
The AK4644 is a stereo CODEC with a built-in Microphone-Amplifier, Headphone-Amplifier and
Receiver-Amplifier. The AK4644 features analog mixing circuits and PLL that allows easy interfacing in
mobile phone and portable A/V player designs. The AK4644 is available in a 32pin QFN, utilizing less
board space than competitive offerings.
FEATURES
1. Recording Function
• 3 Stereo Input Selector
• Stereo Mic Input (Full-differential or Single-ended)
• Stereo Line Input
• MIC Amplifier (+32dB/+26dB/+20dB or 0dB)
• Digital ALC (Automatic Level Control)
(+36dB ∼ −54dB, 0.375dB Step, Mute)
• ADC Performance: S/(N+D): 83dB, DR, S/N: 86dB (MIC-Amp=+20dB)
S/(N+D): 88dB, DR, S/N: 95dB (MIC-Amp=0dB)
• Wind-noise Reduction Filter
• Stereo Separation Emphasis
• Programmable EQ
2. Playback Function
• Digital De-emphasis Filter (tc=50/15µs, fs=32kHz, 44.1kHz, 48kHz)
• Bass Boost
• Soft Mute
• Digital Volume (+12dB ∼ −115.0dB, 0.5dB Step, Mute)
• Digital ALC (Automatic Level Control)
(+36dB ∼ −54dB, 0.375dB Step, Mute)
• Stereo Separation Emphasis
• Stereo Line Output
- Performance: S/(N+D): 88dB, S/N: 92dB
• Mono Receiver-Amp
- BTL Output
- Output Power: 30mW@32Ω (AVDD=3.3V)
• Stereo Headphone-Amp
- S/(N+D): [email protected], S/N: 90dB
- Output Power: 70mW@16Ω (HVDD=5V), 62mW@16Ω (HVDD=3.3V)
- Pop Noise Free at Power ON/OFF
• Analog Mixing: 3 Stereo Input
3. Power Management
4. Master Clock:
(1) PLL Mode
• Frequencies:
11.2896MHz, 12MHz, 12.288MHz, 13.5MHz, 24MHz, 27MHz (MCKI pin)
1fs (LRCK pin)
32fs or 64fs (BICK pin)
(2) External Clock Mode
• Frequencies: 256fs, 512fs or 1024fs (MCKI pin)
5. Output Master Clock Frequencies: 32fs/64fs/128fs/256fs
MS0477-E-01
-1-
2006/10
1 page  
ASAHI KASEI
www.DataSheet4U.com
PIN/FUNCTION
[AK4644]
No. Pin Name
I/O
Function
1 MPWR
O MIC Power Supply Pin
2 VCOM
O
Common Voltage Output Pin, 0.45 x AVDD
Bias voltage of ADC inputs and DAC outputs.
3 AVSS
- Analog Ground Pin
4 AVDD
- Analog Power Supply Pin
5 VCOC
O
Output Pin for Loop Filter of PLL Circuit (AIN3 bit = “0”: PLL is available)
This pin should be connected to AVSS with one resistor and capacitor in series.
RIN3
I Rch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
6 I2C
I
Control Mode Select Pin
“H”: I2C Bus, “L”: 3-wire Serial
7 PDN
I
Power-Down Mode Pin
“H”: Power-up, “L”: Power-down, reset and initializes the control register.
8
CSN
CAD0
I Chip Select Pin (I2C pin = “L”: 3-wire Serial Mode)
I Chip Address 1 Select Pin (I2C pin = “H”: I2C Bus Mode)
9
CCLK
SCL
I Control Data Clock Pin (I2C pin = “L”: 3-wire Serial Mode)
I Control Data Clock Pin (I2C pin = “H”: I2C Bus Mode)
10
CDTI
SDA
I Control Data Input Pin (I2C pin = “L”: 3-wire Serial Mode)
I/O Control Data Input Pin (I2C pin = “H”: I2C Bus Mode)
11 SDTI
I Audio Serial Data Input Pin
12 SDTO
O Audio Serial Data Output Pin
13 LRCK
I/O Input / Output Channel Clock Pin
14 BICK
I/O Audio Serial Data Clock Pin
15 DVDD
- Digital Power Supply Pin
16 DVSS
- Digital Ground Pin
17 MCKI
I External Master Clock Input Pin
18 MCKO
O Master Clock Output Pin
19 TEST1
-
Test 1 Pin
This pin should be left floating.
20 TEST2
-
Test 2 Pin
This pin should be left floating.
21 HVDD
- Headphone-Amp Power Supply Pin
22 HVSS
- Headphone-Amp Ground Pin
23 HPR
O Rch Headphone-Amp Output Pin
24 HPL
O Lch Headphone-Amp Output Pin
25 MUTET
O
Mute Time Constant Control Pin
Connected to HVSS pin with a capacitor for mute time constant.
26
ROUT
RCN
O Rch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
O Receiver-Amp Negative Output Pin (RCV bit = “1”: BTL output)
27
LOUT
RCP
O Lch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
O Receiver-Amp Positive Output Pin (RCV bit = “1”: BTL output)
28 MIN
LIN3
I Mono Signal Input Pin (AIN3 bit = “0”: PLL is available)
I Lch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
29
RIN2
IN2−
I Rch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Microphone Negative Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
30
LIN2
IN2+
I Lch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Microphone Positive Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
31
LIN1
IN1−
I Lch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Microphone Negative Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
32 RIN1
IN1+
I Rch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Microphone Positive Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Note 1. All input pins except analog input pins (MIN/LIN3, LIN1, RIN1, LIN2, RIN2, RIN3) should not be left floating.
Note 2. AVDD or AVSS voltage should be input to I2C pin.
MS0477-E-01
-5-
2006/10
5 Page 
ASAHI KASEI
[AK4644]
www.DataSheet4U.com
FILTER CHARACTERISTICS
(Ta=25°C; AVDD, DVDD=2.6 ∼ 3.6V; HVDD=2.6 ∼ 5.25V; fs=44.1kHz; DEM=OFF; FIL1=FIL3=EQ=OFF)
Parameter
Symbol
min
typ
max Units
ADC Digital Filter (Decimation LPF):
Passband (Note 24)
±0.16dB
PB
0
- 17.3 kHz
−0.66dB
- 19.4 - kHz
−1.1dB
- 19.9 - kHz
−6.9dB
- 22.1 - kHz
Stopband
SB 26.1
-
- kHz
Passband Ripple
PR -
- ±0.1 dB
Stopband Attenuation
SA 73
-
- dB
Group Delay (Note 25)
GD - 19 - 1/fs
Group Delay Distortion
∆GD
-
0
- µs
ADC Digital Filter (HPF): (Note 26)
Frequency Response (Note 24) −3.0dB
FR
-
0.9
-
Hz
−0.5dB
- 2.7 - Hz
−0.1dB
- 6.0 - Hz
DAC Digital Filter (LPF):
Passband (Note 24)
±0.1dB
PB
0
- 19.6 kHz
−0.7dB
- 20.0 - kHz
−6.0dB
- 22.05 -
kHz
Stopband
SB 25.2
-
- kHz
Passband Ripple
PR -
-
±0.01
dB
Stopband Attenuation
SA 59
-
- dB
Group Delay (Note 25)
GD - 25 - 1/fs
DAC Digital Filter (LPF) + SCF:
Frequency Response: 0 ∼ 20.0kHz
FR - ±1.0 - dB
DAC Digital Filter (HPF): (Note 26)
Frequency Response (Note 24) −3.0dB
FR
-
0.9
-
Hz
−0.5dB
- 2.7 - Hz
−0.1dB
- 6.0 - Hz
BOOST Filter: (Note 27)
Frequency Response MIN 20Hz
FR
- 5.76 -
dB
100Hz
- 2.92 -
dB
1kHz
- 0.02 -
dB
MID 20Hz
FR
- 10.80 -
dB
100Hz
- 6.84 -
dB
1kHz
- 0.13 -
dB
MAX 20Hz
FR
- 16.06 -
dB
100Hz
- 10.54 -
dB
1kHz
- 0.37 -
dB
Note 24. The passband and stopband frequencies scale with fs (system sampling rate).
For example, DAC is PB=0.454*fs (@−0.7dB). Each response refers to that of 1kHz.
Note 25. The calculated delay time caused by digital filtering. This time is from the input of analog signal to setting of the
16-bit data of both channels from the input register to the output register of the ADC. This time includes the
group delay of the HPF. For the DAC, this time is from setting the 16-bit data of both channels from the input
register to the output of analog signal. Group delay of DAC part is 25/fs(typ) at PMADL=PMADR bits = “0”.
Note 26. When PMADL bit = “1” or PMADR bit = “1”, the HPF of ADC is enabled but the HPF of DAC is disabled.
When PMADL=PMADR bits = “0”, PMDAC bit = “1”, the HPF of DAC is enabled but the HPF of ADC is
disabled.
Note 27. These frequency responses scale with fs. If a high-level and low frequency signal is input, the analog output clips
to the full-scale.
MS0477-E-01
- 11 -
2006/10
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK4644.PDF ] | |
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