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PDF 33884 Data sheet ( Hoja de datos )
| Número de pieza | 33884 | |
| Descripción | Switch Monitor Interface | |
| Fabricantes | Freescale Semiconductor | |
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Technical Data
Document Number: MC33884
Rev. 4.0, 11/2006
Switch Monitor Interface
The 33884 Switch Monitor Interface is a monolithic silicon integrated
circuit (IC) to perform switch monitoring functions. The device provides
efficient interface between electrical switches and low voltage
microprocessors. The 33884 supplies switch contact pull-up and pull
down current while monitoring the input voltage level. All inputs are
protected for transients when implemented with an appropriate static
discharge capacitor used on the inputs.
33884
SWITCH MONITOR INTERFACE
There are four modes of operation: Sleep, Normal, Polling, and
Polling + INT Timer.
The Polling and Timer modes are similar, except the Timer mode
has the addition of an interrupt that is sent to the microprocessor if a
switch is sensed closed, or upon the internal interrupt timer times out.
An interrupt is ultimately sent to the microprocessor. All modes of
operation are easily programmed via the Serial Peripheral Interface
(SPI) control.
Features
DW SUFFIX
EG (PB-FREE) SUFFIX
98ASB42344B
24-PIN SOICW
• Full Operation with 7.0 V < VPWR < 26 V, Limited Operation with
5.5 V < VPWR < 7.0 V
• Input Voltage Range: -14 V to 40 V
• Interface Directly to Microprocessors Using SPI Protocol
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
• Wake Up on Change of Monitored Switch Status
• Programmable Wetting Current
• Four Switch-to-Ground Switches
MC33884DW/R2
-40°C to 105°C
MCZ33884EG/R2
24 SOICW
• Six (Fixed Function) Inputs Monitoring Six Switch-to-Ground
Switches
• Two (Fixed Function) Inputs Monitoring Two Switch-to-Battery Switches
• Quiescent Current in Sleep Mode < 10 µA
• Reset Input Defaults the Device to Sleep Mode
• Pb-Free Packaging Designated by Suffix Code EG
VPWR
2 VPWR
Sense Inputs
4 GND / VPWR
Sense Inputs
6 GND
Sense Inputs
33884
SB1 VPWR
SB2 VDD
SP1
CS
SI
SP2 SO
SP3 SCLK
SP4 INT
SG1 RESET
SG2
SG3
GND
VBG
SG4 SYNC
SG5 MASL
SG6
VDD
MCU
VDD
CS
MOSI
MISO
CLK
INT
RESET
GND
Figure 1. 33884 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as
may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
1 page  
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
Value
Unit
Power Supply Voltage
CS, SI, SO, SCLK, RST, MASL, SYNC, INT (1)
VPWR Supply Voltage (1)
Switch Input Voltage Range
Recommended Frequency of SPI Operation
ESD Voltage (2)
Human Body Model (3) (4)
Machine Model (3) (5)
VDD
VPWR
VSI
fSPI
VESD1
VESD2
-0.3 to 7.0
-16 to 50
-14 to 40
3.0
4000
200
VDC
VDC
VDC
MHz
V
Storage Temperature
TSTG
-55 to 150
°C
Operating Case Temperature
TC
-40 to 105
°C
Operating Junction Temperature
Peak Package Reflow Temperature During Reflow (6), (7)
TJ
TPPRT
-40 to 150
Note 7.
°C
°C
Thermal Resistance (Junction-to-Ambient)
PθJ-A
107 °C/W
Notes
1 Exceeding these limits may cause malfunction or permanent damage to the device.
2 ESD data available upon request.
3 ESD1 testing is performed in accordance with the Human Body Model (CZAP=100 pF, RZAP=1500 Ω) and ESD2 testing is performed
in accordance with the Machine Model (CZAP=200 pF, RZAP=0 Ω).
4 All pins are tested individually.
5 1 kV on VPWR and VDD when connected together. See page three.
6 Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
7. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33884
5
5 Page 
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
SYNCHRONIZATION (SYNC)
The Synchronization (SYNC) input is used by the slave IC
during the Polling mode. The SYNC allows multiple 33884
ICs to poll the multiple inputs concurrently. The master
controls the polling period. The slave is allowed to shut down
it’s oscillator, thereby conserving current. When the slave
receives the SYNC signal from the master, the slave starts
the internal oscillator and reads the switch inputs.
INTERRUPT (INT)
The Interrupt (INT) pin is an interrupt output from the
33884. The INT pin is an open drain output with an internal
pull-up. In the Normal mode, a switch state change triggers
the INT pin. The INT pin and INT bit (flag) are latched on the
falling edge of CS. This procedure determines the interrupt
origin. The flag INT bit in the SPI word is the inverse of the
INT pin. The INT pin is cleared on the rising edge of CS. The
INT pin is active only during the ON time (when sink and
source currents are active) in the Polling mode.
RESET (RST)
The Reset (RST) pin is active low reset input to the 33884.
When asserted, the 33884 will reset all internal registers,
timers, and enters a Sleep mode (with all switch inputs in a
Tri-State condition). Only an MCU SPI command word will
wake the 33884 from a Sleep state. The RST pin may be
controlled directly from a general purpose input/output
(GPIO) pin or from a system/MCU reset.
BANDGAP VOLTAGE (VBG)
The Bandgap Voltage (VBG) pin requires a 130 kΩ to
ground for standard wetting and sustain currents. The device
is tested with a 0.1 percent value, but a standard 1.0 percent
could be used to function properly.
VOLTAGE POWER (VPWR)
The Voltage Power (VPWR) pin is battery/supply source
pin for the 33884. The VPWR pin requires external reverse
battery/supply and transient protection. Maximum input
voltage on VPWR is 40 V. All wetting currents and sustain
currents are derived from VPWR.
SWITCH PINS (SP1 : SP4)
The 33884 has four programmable switch sense inputs
(SP1- P4) to read switch-to-ground or switch-to-battery/
supply contacts. Transient battery/supply voltages greater
than 40 V must be clamped by an external device. Surface
mount 0805 MOVs and transient voltage suppressors (TVS)
are available in SOT-23 packages. The sensed input is
compared with an internal 4.0 V reference. When
programmed to sense switch-to-battery, sensed voltages
greater than 4.0 V are interpreted as a CLOSED switch, while
sensed voltages less than 4.0 V are interpreted as an OPEN
switch. The opposite holds true when inputs are programmed
to sense switch-to-ground. Further programming can set the
wetting currents or make the inputs Tri-State. Programming
methods are provided in the following section.
SWITCH-TO-BATTERY (SB1 AND SB2)
The two Switch-to-Battery (SB) pins sense inputs only.
Transient battery/supply voltages greater than 40 V must be
clamped by an external device. Surface mount 0805 MOVs
and transient voltage suppressors (TVS) are available in
SOT-23 packages.
The sensed input is compared with an internal 4.0 V
reference. Voltages greater than 4.0 V are interpreted as a
CLOSED switch, while sensed voltages less than 4.0 V are
interpreted as an OPEN switch. Programming can set wetting
currents or Tri-State the input. Programming methods are
provided in the following section.
SWITCH-TO-GROUND (SG1 : SG6)
The six Switch-to-Ground (SG) pins are inputs only. The
input is compared with the internal 4.0 V reference. Voltages
greater than 4.0 volts are interpreted as an OPEN switch.
Voltages less than 4.0 V are interpreted as a CLOSED
switch. Programming can set the wetting currents or Tri-State
the input. Programming methods are provided in the
following section.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33884
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet 33884.PDF ] | |
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