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PDF MWS5114 Data sheet ( Hoja de datos )
| Número de pieza | MWS5114 | |
| Descripción | 1024-Word x 4-Bit LSI Static RAM | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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MWS5114
March 1997
1024-Word x 4-Bit
LSI Static RAM
Features
• Fully Static Operation
• Industry Standard 1024 x 4 Pinout (Same as Pinouts
for 6514, 2114, 9114, and 4045 Types)
• Common Data Input and Output
• Memory Retention for Standby Battery Voltage as Low
as 2V Min
• All Inputs and Outputs Directly TTL Compatible
• Three-State Outputs
• Low Standby and Operating Power
Description
The MWS5114 is a 1024 word by 4-bit static random access
memory that uses the ion-implanted silicon gate comple-
mentary MOS (CMOS) technology. It is designed for use in
memory systems where low power and simplicity in use are
desirable. This type has common data input and data output
and utilizes a single power supply of 4.5V to 6.5V.
The MWS5114 is supplied in 18 lead, hermetic, dual-in-line
sidebrazed ceramic packages (D suffix) and in 18 lead dual-
in-line plastic packages (E suffix).
Ordering Information
200ns
MWS5114E3
MWS5114D3
MWS5114D3X
250ns
MWS5114E2
MWS5114E2X
MWS5114D2
300ns
MWS5114E1
MWS5114D1
TEMPERATURE RANGE PACKAGE
0oC to +70oC
PDIP
Burn-In
0oC to +70oC
SBDIP
Burn-In
PKG. NO.
E18.3
E18.3
D18.3
D18.3
Pinout
MWS5114
(PDIP, SBDIP)
TOP VIEW
A6 1
A5 2
A4 3
A3 4
A0 5
A1 6
A2 7
CS 8
VSS 9
18 VDD
17 A7
16 A8
15 A9
14 I/O1
13 I/O2
12 I/O3
11 I/O4
10 WE
FUNCTION
Read
Write
Not Selected
OPERATIONAL MODES
CS WE
DATA PINS
0 1 Output: Dependent on data
0 0 Input
1 X High Impedance
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-160
File Number 1325.2
1 page  
MWS5114
Dynamic Electrical Specifications at TA = 0oC to +70oC, VDD = 5V ±5%, Input tR, tF = 10ns; CL = 50pF and 1 TTL Load
LIMITS
MWS5114-3
MWS5114-2
MWS5114-1
PARAMETER
(NOTE 1) (NOTE 2)
(NOTE 1) (NOTE 2)
(NOTE 1) (NOTE 2)
SYMBOL MIN
TYP MAX MIN
TYP MAX MIN
TYP MAX UNITS
READ CYCLE TIMES (FIGURE 1)
Read Cycle
tRC 200 160 - 250 200 - 300 250 - ns
Access from
Address
tAA
-
160 200
-
200 250
-
250 300 ns
Chip Selection to
tCO
-
110 150
-
150 200
-
200 250 ns
Output Valid
Chip Selection to
tCX
20
100 -
20
100 -
20
100 - ns
Output Active
Output Three-State
from Deselection
tOTD
-
75 125
-
75 125
-
75 125 ns
Output Hold from
tOHA
50
100 -
50
100 -
50
100 - ns
Address Change
WRITE CYCLE TIMES (FIGURE 2)
Write Cycle
tWC 200 160 - 250 200 - 300 220 - ns
Write
tW 125 100 - 150 120 - 200 140 - ns
Write Release
tWR 50
40 - 50
40 - 50
40 - ns
Address to Chip
Select Setup Time
tACS
0
0-0
0-0
0 - ns
Address to Write
Setup Time
tAW
25
20 - 50
40 - 50
40 - ns
Data to Write
Setup Time
tDSU
75
50 - 75
50 - 75
50 - ns
Data Hold from
Write
tDH 30
10 - 30
10 - 30
10 - ns
NOTES:
1. Time required by a limit device to allow for the indicated function.
2. Typical values are for TA = 25oC and nominal VDD.
6-164
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MWS5114.PDF ] | |
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