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PDF SY87739L Data sheet ( Hoja de datos )
| Número de pieza | SY87739L | |
| Descripción | PROTOCOL TRANSPARENT 3.3V 10MHz to 729MHz FRACTIONAL-N SYNTHESIZER | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
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Micrel, Inc.
PROTOCOL TRANSPARENT
3.3V 10MHz to 729MHz
FRACTIONAL-N SYNTHESIZER
SY87739L
SY87739L
FEATURES
DESCRIPTION
■ Protocol transparent fractional-N synthesizer from
10MHz to 729MHz from a single 27MHz reference
oscillator
■ Generates exactly the correct frequency for common
transport protocols with or without FEC
■ Directly enables SY87721L CDR to lock onto any
data rate within its range
■ Exceeds BellCore and ITU jitter generation
specifications
■ Programmable via MicroWire™ interface
■ Available in 32-Pin EPAD-TQFP package
APPLICATIONS
■ Metro access system
■ Transponders
■ Multiplexers: access, Add Drop Mux
The SY87739L is a complete rate independent frequency
synthesizer integrated circuit. From a single reference
source, this device generates a differential PECL output
frequency from 10MHz up to 729MHz.
The SY87739L generates an exactly correct reference
frequency for common data transport protocols. This is
especially important in transponder applications, where a
standards compliant protocol data unit must be generated
downstream, even in the absence of any signal from the
associated upstream interface. In addition, the SY87739L
will generate exactly correct reference frequencies for
common data transport protocols augmented by forward
error correction codes. The SY87739L accepts configuration
via a MicroWire™ interface.
For proprietary applications, the SY87739L generates
reference frequencies guaranteed to enable the SY87721L
CDR to lock to any possible baud rate from 28Mbps to
2.7Gbps.
■ SONET/SDH/ATM-based transmission systems,
modules and test equipment
■ Broadband cross-connects
www.DataSheet4U.com
■ Fiber optic test equipment
■ Protocols supported:
OC-1, OC-3, OC-12, OC-48, ATM, Gigabit Ethernet,
Fast Ethernet, Fibre Channel, 2X Fibre Channel,
1394, InfiniBand, Proprietary Optical Transport
TYPICAL APPLICATIONS CIRCUIT
TYPICAL PERFORMANCE
VCC
14
Saronix
SEL-2431C
27.0000MHz
8
1
7 121
0.1µF
0.1µF
2k 2k
31 30
26 25
3 REFCLK+
CLKOUT+ 22
4
REFCLK-
SY87739L
CLKOUT-
21
121 121
VCC
6 7 8 14
10, 25, 32
1, 9, 17, 18, 24
121
Cycle-to-Cycle Jitter
vs. Frequency
6
5
4
3
2
1
0
0 100 200 300 400 500 600 700 800
OUTPUT FREQUENCY (MHz)
Microcontroller
AnyClock and AnyRate are registered trademarks of Micrel, Inc.
MicroWire is a trademark of National Semiconductor.
M9999-111406
[email protected] or (408) 955-1690
1
Rev.: D Amendment: /0
Issue Date: November 2006
1 page  
Micrel, Inc.
SY87739L
FUNCTIONAL DESCRIPTION
General
The SY87739L AnyClock™ Fractional-N Synthesizer is
used in serial data streaming applications, where the
incoming data rate on a channel may vary, or where the
incoming data rate on a channel is unknown ahead of time.
In these situations, a valid output stream must still be
generated even in the absence of any edges on the
corresponding input stream. Up until now, designers had to
resort to sub-optimal solutions such as providing multiple
reference oscillators. Beyond the potential noise and EMI
issues, the designer has no way to future proof his circuit,
as it would prove near impossible to pre-provision all the
reference frequencies that might be needed after
deployment, yet are unknown at this time.
The SY87739L solves this problem by generating exact
frequencies for common data streaming protocols, all from
one 27MHz reference. If any of these protocols include
overhead due to use of common digital wrappers, The
SY87739L still generates the exact frequency required,
including the overhead.
Besides generating reference rates for common protocols
directly, the SY87739L also generates reference frequencies
for Micrel’s SY87721L CDR/CMU, such that it will reliably
recover data at any rate between 28Mbps and 2,700Mbps
without any gaps.
A simple 3-wire MicroWire™ bit-serial interface loads a
configuration that describes the desired output reference
frequency. All common microcontrollers support this
MicroWire™ interface. Those microcontrollers that don’t
support this interface in hardware can easily emulate the
interface in firmware.
The large set of possible frequencies that the SY87739L
generates, are divided into three classes. First, the sets of
frequencies that match a particular data streaming protocol
are in the “protocol” category. Second, the set of frequencies
that are guaranteed to be near enough to any arbitrary data
rate such that the SY87721L will lock are in the “picket
fence” category. Third, the set of frequencies that do not fit
into either of the first two categories is in the third category,
The SY87739L generates these important reference
frequencies through two tandem PLL circuits. The first PLL
uses a modified fractional-N approach to generate a rational
ratio frequency. This PLL is capable of generating all protocol
data rates, except for those that include FEC or digital
wrapper overhead. A second, more traditional P/Q
synthesizer optionally adjusts the output frequency of the
first, fractional-N synthesizer, to accommodate these FEC
or digital wrapper data rates.
The bit serial interface conveys 32 bits of configuration
data from a microcontroller to SY87739L. This simple
interface consists of an active high chip select, a serial
clock (2MHz or less) and a serial data input. Each clock
cycle one bit of configuration data transfers to SY87739L.
Circuit Description
The heart of SY87739L is its fractional-N synthesizer, as
shown in Figure 1.
Loop Filter
Input
Reference
Frequency
(fREF)
Phase-
Frequency
Detector/
Charge
Pump
VCO
Output
Frequency
(fFNOUT)
÷P
Mux
÷P-1
Control
Figure 1. Fractional-N Synthesizer Architecture
The two dividers in the feedback path always differ by
one count. That is, if one divider is set to divide by P = 5,
then the other divider divides by P–1 = 4 . The mux choses
between the two based on the control circuit.
The idea behind the fractional-N approach is that every
input reference edge is used. Only those output edges that
are nearest to an input edge get fed back to the phase-
frequency comparator. In addition, the nearest output edges
are chosen in such a way that the net offset, over a number
of edges, zeroes out. It is the control circuit’s job to drive
the mux such that only the “correct” edges get fed back.
In the above fractional-N circuit, if the output frequency
should be, for example, 5 times the input frequency, then P
is set to 5, and the control circuit sets the mux to only feed
back the output of the P divider.
If the output frequency should be, for example, 41/2 times
the input frequency, then the control circuit alternates evenly
between the P and the P–1 divider output. For every two
input edges (one to compare against P, and another to
compare against P–1), you will get 5 + 4 output edges,
yielding an output frequency 9/2 the input frequency.
Whereas P sets the integer part of the multiplication factor
from input to output frequency, the control circuit determines
the fractional part. By mixing the output of the P and P–1
dividers correctly, the control circuit can fashion any output
frequency from P–1 times the input to P times the input, as
long as that ratio can be expressed as a ratio of integers.
M9999-111406
[email protected] or (408) 955-1690
5
5 Page 
Micrel, Inc.
SYSTEM BLOCK DIAGRAM
SY87739L
FIBER
PIN DIODE
FIBER
LASER
DIODE
SY889x3
TIA POST AMP
SY87721L
AnyRate
CDR
RDATA
RCLK
One
REF_OSC
SY87739L
AnyClock
Fractional-N
Synthesizer
REF_CLK
CMU
8 bits
TCLK
SY889x2
LASER
DIODE
DRIVER
µP LOCK
SY87724L
DEMUX
4, 5, 8, 10 bits
MUX
4, 5, 8, 10 bits
M9999-111406
[email protected] or (408) 955-1690
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet SY87739L.PDF ] | |
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