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PDF MB88153 Data sheet ( Hoja de datos )
| Número de pieza | MB88153 | |
| Descripción | Spread Spectrum Clock Generator | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MB88153 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-29118-2E
Spread Spectrum Clock Generator
MB88153
■ DESCRIPTION
MB88153 is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary (EMI)
can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator.
It corresponds to both of the center spread which modulates input frequency as Middle Centered and down spread
which modulates so as not to exceed input frequency.
■ FEATURE
• Power down pin : 600 µA (Max) consumption current at power down
• Input frequency : 16.6 MHz to 134 MHz
• Output frequency : 16.6 MHz to 134 MHz (One-fold input frequency)
• Modulation rate can select from ± 0.5%, ± 1.5% − 1.0% or − 3.0%. (For center spread / down spread.)
• Modulation clock output Duty : 40% to 60%
• Modulation clock Cycle-Cycle Jitter : Less than 100 ps
• Low current consumption by CMOS process : 4.0 mA (24 MHz : Typ-sample, no load)
• Power supply voltage : 3.3 V ± 0.3 V
• Operating temperature : − 40 °C to +85 °C
• Package : SOP 8-pin
■ PACKAGE
8-pin plastic SOP
(FPT-8P-M02)
1 page  
■ BLOCK DIAGRAM
VDD
MB88153
XPD
FREQ0
FREQ1
ENS
CKIN
Power down
setting
Frequency setting
Frequency setting
Modulation enable
setting
Reference clock
PLL block
Clock output
CKOUT
VSS
Reference
clock
1 Frequency setting
−
M
Phase
compare
Charge
pump
V/I
conversion
IDAC
ICO
Modulation
1 clock output
−
N
Loop filter
1 Modulation rate
−
Modulation logic
setting
L Modulation enable
setting
MB88153 PLL block
A glitchless IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing
EMI.
5
5 Page 
■ OUTPUT CLOCK DUTY CYCLE (tDCC = tb/ta)
ta
tb
CKOUT
■ INPUT FREQUENCY (fin = 1/tin)
tin
CKIN
■ OUTPUT SLEW RATE (SR)
MB88153
1.5 V
0.8 VDD
CKOUT
tr
Note : SR = (2.4−0.4) /tr, SR = (2.4−0.4) /tf
2.4 V
0.4 V
tf
■ CYCLE-CYCLE JITTER
CKOUT
tn
tn+1
Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after
(or, immediately before) .
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet MB88153.PDF ] | |
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