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PDF CY7C195 Data sheet ( Hoja de datos )
| Número de pieza | CY7C195 | |
| Descripción | (CY7C194 - CY7C196) 64K x 4 Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CY7C195 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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96
CY7C194
eet4U.com 64K x 4 StaCCtiYYc77RCCA11M9956Features
h• High speed
taS— 12 ns
a• Output enable (OE) feature (7C195 and 7C196)
• CMOS for optimum speed/power
.D• Low active power
w— 880 mW
w• Low standby power
w — 220 mW
m• TTL-compatible inputs and outputs
• Automatic power-down when deselected
oFunctional Description
.cThe CY7C194, CY7C195, and CY7C196 are high-perfor-
mance CMOS static RAMs organized as 65,536 by 4 bits.
UEasy memory expansion is provided by active LOW Chip En-
able(s) (CE on the CY7C194 and CY7C195, CE1, CE2 on the
CY7C196) and three-state drivers. They have an automatic
power-down feature, reducing the power consumption by 75%
when deselected.
Writing to the device is accomplished when the Chip Enable(s)
(CE on the CY7C194 and CY7C195, CE1, CE2 on the
CY7C196) and Write Enable (WE) inputs are both LOW. Data
on the four input pins (I/O0 through I/O3) is written into the
memory location, specified on the address pins (A0 through
A15).
Reading the device is accomplished by taking the Chip En-
able(s) (CE on the CY7C194 and CY7C195, CE1, CE2 on the
CY7C196) LOW, while Write Enable (WE) remains HIGH. Un-
der these conditions the contents of the memory location
specified on the address pins will appear on the four data I/O
pins.
A die coat is used to ensure alpha immunity.
Logic Block Diagram
Sheet4INPUTBUFFER
taA1
A2
A3
A4
aA5
AA67
1024 x 64 x 4
ARRAY
A8
.DA9
A10
Pin Configurations
DIP/SOJ
Top View
DIP/SOJ
Top View
A6 1
24 VCC
NC 1
28 VCC
A7 2
23 A5
A6 2
27 A5
A8 3
A9 4
22 A4
21 A3
A7 3
A8 4
26 A4
25 A3
A10 5
20 A2
A9 5
24 A2
A11 6 7C194 19
A12 7
18
A13 8
17
A14 9
16
A1
A0
I/O3
I/O2
A10
A11
6
7
7C195
7C196
23
22
A1
A0
A12 8
21 NC
A13 9
20
CE2
(7C196)
A15 10
CE 11
15 I/O1
14 I/O0
A14 10
A15 11
19 I/O3
18 I/O2
NC
(7C195)
I/O3
GND 12
13 WE
CE1 12
17 I/O1
OE 13
16 I/O0
I/O2
C194-2
GND 14
15 WE
C194-3
I/O1
I/O0
COLUMN
ww mDECODER
POWER
DOWN
CE2 (7C196 only)
CE1
WE
(OE)
(7C195 and
7C196 ONLY)
w oC194-1
t4U.cSelection Guide
SheeMaximum Access Time (ns)
taMaximum Operating Current (mA)
aMaximum Standby Current (mA)
7C194-12
7C195-12
7C196-12
12
155
30
7C194-15
7C195-15
7C196-15
15
145
30
7C194-20
7C195-20
7C196-20
20
135
30
7C194-25
7C195-25
7C196-25
25
115
30
7C194-35
7C195-35
7C196-35
35
115
30
7C194-45
7C196-45
45
30
ww.DCypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
wDocument #: 38-05162 Rev. **
Revised September 18, 2001
1 page  
CY7C194
CY7C195
CY7C196
Switching Waveforms
Read Cycle No. 1 [11, 12]
ADDRESS
DATA OUT
tOHA
PREVIOUS DATA VALID
tAA
tRC
Read Cycle No. 2 [11, 13]
CE1, CE2
OE
(7C195 and
7C196)
DATA OUT
VCC
SUPPLY
CURRENT
tACE
tDOE
t LZOE
HIGH IMPEDANCE
t LZCE
t PU
50%
t RC
DATA VALID
Write Cycle No. 1 (CE Controlled)[10, 14, 15]
ADDRESS
CE1
CE2
(7C196)
tSA
WE
DATA I/O
tWC
tAW
tSCE
tSD
DATA VALID
Notes:
11. WE is HIGH for read cycle.
12. Device is continuously selected: CE1 = VIL, CE2 = VIL (7C196), and OE = VIL (7C195 and 7C196).
13. Address valid prior to or coincident with CE1 and CE2 transition LOW.
14. Data I/O will be high impedance if OE = VIH (7C195 and 7C196).
15. If any CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
DATA VALID
C194-8
t HZOE
t HZCE
HIGH
IMPEDANCE
tPD
50%
ICC
ISB
C194-6
tHA
tHD
C194-7
Document #: 38-05162 Rev. **
Page 5 of 12
5 Page 
Package Diagrams (continued)
24-Lead (300-Mil) Molded SOJ V13
CY7C194
CY7C195
CY7C196
28-Lead (300-Mil) Molded SOJ V21
51-85030-A
51-85031-B
Document #: 38-05162 Rev. **
Page 11 of 12
© Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet CY7C195.PDF ] | |
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