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PDF MT48LC16M16A2 Data sheet ( Hoja de datos )
| Número de pieza | MT48LC16M16A2 | |
| Descripción | Automotive SDR SDRAM | |
| Fabricantes | Micron Technology | |
| Logotipo |  |
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256Mb: x4, x8, x16 Automotive SDRAM
Features
Automotive SDR SDRAM
MT48LC64M4A2 – 16 Meg x 4 x 4 banks
MT48LC32M8A2 – 8 Meg x 8 x 4 banks
MT48LC16M16A2 – 4 Meg x 16 x 4 banks
Features
• PC100- and PC133-compliant
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal, pipelined operation; column address can
be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto precharge, includes concurrent auto precharge
and auto refresh modes
• Self refresh mode (not available on AAT devices)
• Auto refresh
– 64ms, 8192-cycle (commercial and industrial)
– 16ms, 8192-cycle (automotive)
• LVTTL-compatible inputs and outputs
• Single 3.3V ±0.3V power supply
• AEC-Q100
• PPAP submission
• 8D response time
Options
• Configurations
– 64 Meg x 4 (16 Meg x 4 x 4 banks)
– 32 Meg x 8 (8 Meg x 8 x 4 banks)
– 16 Meg x 16 (4 Meg x 16 x 4 banks)
• Write recovery (tWR)
– tWR = 2 CLK
• Plastic package – OCPL1
– 54-pin TSOP II OCPL1 (400 mil)
(standard)
Marking
64M4
32M8
16M16
A2
TG
Options
Marking
– 54-pin TSOP II OCPL1 (400 mil)
P
Pb-free
– 60-ball FBGA (x4, x8) (8mm x 16mm) FB
– 60-ball FBGA (x4, x8) (8mm x 16mm) BB
Pb-free
– 54-ball VFBGA (x16) (8mm x 14 mm) FG2
– 54-ball VFBGA (x16) (8mm x 14 mm) BG2
Pb-free
– 54-ball VFBGA (x16) (8mm x 8 mm)
F43
– 54-ball VFBGA (x16) (8mm x 8 mm)
B43
Pb-free
• Timing – cycle time
– 6ns @ CL = 3 (x8, x16 only)
-6A
– 7.5ns @ CL = 3 (PC133)
-75
– 7.5ns @ CL = 2 (PC133)
-7E
• Self refresh
– Standard
None
– Low power
L4
• Operating temperature range
– Industrial (–40˚C to +85˚C)
AIT
– Automotive (–40˚C to +105˚C)
AAT4
• Revision
:D/:G
Notes:
1. Off-center parting line.
2. Only available on Revision D.
3. Only available on Revision G.
4. Contact Micron for availability.
Table 1: Key Timing Parameters
CL = CAS (READ) latency
Speed Grade
-6A
-7E
-75
-7E
-75
Clock
Frequency
167 MHz
143 MHz
133 MHz
133 MHz
100 MHz
Access Time
CL = 2
CL = 3
– 5.4ns
– 5.4ns
– 5.4ns
5.4ns
–
6ns –
Setup Time
1.5ns
1.5ns
1.5ns
1.5ns
1.5ns
Hold Time
0.8ns
0.8ns
0.8ns
0.8ns
0.8ns
PDF: 09005aef848d99e8
256Mb_ait_aat_sdr_esg.pdf - Rev. C 1/14 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
1 page  
256Mb: x4, x8, x16 Automotive SDRAM
Features
Figure 51: Single WRITE Without Auto Precharge ............................................................................................ 78
Figure 52: Auto Refresh Mode ........................................................................................................................ 80
Figure 53: Self Refresh Mode .......................................................................................................................... 82
Figure 54: Power-Down Mode ........................................................................................................................ 83
Figure 55: Clock Suspend During WRITE Burst ............................................................................................... 84
Figure 56: Clock Suspend During READ Burst ................................................................................................. 85
Figure 57: Clock Suspend Mode ..................................................................................................................... 86
PDF: 09005aef848d99e8
256Mb_ait_aat_sdr_esg.pdf - Rev. C 1/14 EN
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
5 Page 
256Mb: x4, x8, x16 Automotive SDRAM
Pin and Ball Assignments and Descriptions
Pin and Ball Assignments and Descriptions
Figure 4: 54-Pin TSOP (Top View)
x4
-
NC
-
NC
DQ0
-
NC
NC
-
NC
DQ1
-
NC
-
NC
-
-
-
-
-
-
-
-
-
-
-
-
x8 x16
- VDD
DQ0 DQ0
- VDDQ
NC DQ1
DQ1 DQ2
- VSSQ
NC DQ3
DQ2 DQ4
- VDDQ
NC DQ5
DQ3 DQ6
- VSSQ
NC DQ7
- VDD
NC DQML
- WE#
- CAS#
- RAS#
- CS#
- BA0
- BA1
- A10
- A0
- A1
- A2
- A3
- VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
x16 x8 x4
54 VSS -
-
53 DQ15 DQ7 NC
52 VSSQ -
-
51 DQ14 NC NC
50 DQ13 DQ6 DQ3
49 VDDQ -
-
48 DQ12 NC NC
47 DQ11 DQ5 NC
46 VSSQ -
-
45 DQ10 NC NC
44 DQ9 DQ4 DQ2
43 VDDQ -
-
42 DQ8 NC NC
41 VSS -
40 NC -
-
-
39 DQMH DQM DQM
38 CLK -
-
37 CKE -
-
36 A12 -
-
35 A11 -
-
34 A9 -
-
33 A8 -
-
32 A7 -
-
31 A6 -
-
30 A5 -
-
29 A4 -
-
28 VSS -
-
Notes: 1. The # symbol indicates that the signal is active LOW. A dash (-) indicates that the x8 and
x4 pin function is the same as the x16 pin function.
2. Package may or may not be assembled with a location notch.
PDF: 09005aef848d99e8
256Mb_ait_aat_sdr_esg.pdf - Rev. C 1/14 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MT48LC16M16A2.PDF ] | |
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