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PDF SI306x Data sheet ( Hoja de datos )
| Número de pieza | SI306x | |
| Descripción | (SI306x) Global Line-Side DAA for Embedded System-Side Module | |
| Fabricantes | Silicon Laboratories | |
| Logotipo |  |
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Si306x
GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
Features
Complete DAA includes the following:
80 dB dynamic range TX/RX paths to Pulse dialing support
support up to V.92 modem speeds
Billing tone detection
Programmable line interface
Overload detection
AC termination
DC termination
mRing detect threshold
Ringer impedance
oIntegrated codec and 2- to 4-wire
.canalog hybrid
Integrated ring detector
UApplications
> 5000 V isolation
Proprietary isolation interface to
integrated DAA module
Line voltage monitor
Loop current monitor
Caller ID support
Low-profile SOIC available in lead-
free/ROHS-compliant packages
t4V.92 soft modems
PDAs
eDescription
Set-top boxes
Fax machines
POS terminals
Multi-function
Printers
heThe Si306x is an integrated direct access arrangement (DAA) with a
programmable line interface to meet global telephone line interface
Srequirements. Available in a 16-pin small outline package, it eliminates
the need for an analog front end (AFE), an isolation transformer, relays,
taopto-isolators, and a 2- to 4-wire hybrid. The Si306x dramatically reduces
the number of discrete components and cost required to achieve
acompliance with global regulatory requirements. The Si306x interfaces
directly to a Silicon Laboratories integrated DAA system-side module.
.DFunctional Block Diagram
w Si306x
Ordering Information
See page 59.
Pin Assignments
Si306x
QE
DCT
RX
IB
C1B
C2B
VREG
RNG1
1
2
3
4
5
6
7
8
16 DCT2
15 IGND
14 DCT3
13 QB
12 QE2
11 SC
10 VREG2
9 RNG2
US Patent # 5,870,046
US Patent # 6,061,009
Other Patents Pending
ww Hybrid and
RX
IB
SC
Silicon
Laboratories
Embedded
System-side
DAA Module
Isolation
Interface
dc
Termination
DCT
VREG
VREG2
DCT2
DCT3
Ring Detect
Off-Hook
RNG1
RNG2
QB
QE
QE2
Preliminary Rev. 0.9 1/05
Copyright © 2005 by Silicon Laboratories
Si306x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
1 page  
Si306x
Table 2. Loop Characteristics
(VD = 3.0 to 3.6 V, TA = 0 to 70 °C for F/K-Grade, see Figure 1)
Parameter
Symbol
Test Condition
Min Typ Max Unit
DC Termination Voltage
VTR IL = 20 mA, MINI = 11,
— — 6.0 V
ILIM = 0, DCV = 00, DCR = 0
DC Termination Voltage
VTR IL = 120 mA, MINI = 11,
9—— V
ILIM = 0, DCV = 00, DCR = 0
DC Termination Voltage
VTR IL = 20 mA, MINI = 00,
— — 7.5 V
ILIM = 0, DCV = 11, DCR = 0
DC Termination Voltage
VTR IL = 120 mA, MINI = 00,
9—— V
ILIM = 0, DCV = 11, DCR = 0
DC Termination Voltage
VTR IL = 20 mA, MINI = 00,
— — 7.5 V
ILIM = 1, DCV = 11, DCR = 0
DC Termination Voltage
VTR IL = 60 mA, MINI = 00,
40 —
—
V
ILIM = 1, DCV = 11, DCR = 0
On Hook Leakage Current
Operating Loop Current
Operating Loop Current
DC Ring Current
ILK
ILP
ILP
VTR = –48 V
MINI = 00, ILIM = 0
MINI = 00, ILIM = 1
— — 3 µA
10 — 120 mA
10 — 60 mA
— 1.5 3 µA
Ring Detect Voltage*
Ring Detect Voltage*
Ring Frequency
Ringer Equivalence Number
VRD
VRD
FR
REN
RT = 0
RT = 1
13.5
19.35
15
—
15
21.5
—
—
16.5
23.65
68
0.2
Vrms
Vrms
Hz
*Note: The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected
above the maximum.
TIP
+
DAA
Line-side
VTR
Device
600 Ω
10 µF
IL
RING –
Figure 1. Test Circuit for Loop Characteristics
Preliminary Rev. 0.9
5
5 Page 
Si306x
5. AOUT PWM Output
Figure 3 illustrates an optional circuit to support the pulse width modulation (PWM) output capability of the Si306x
for call progress monitoring purposes. To enable this mode, the INTE bit (Register 2) should be set to 0, the PWME
bit (Register 1) set to 1, and the PWMM bits (Register 1) set to 00.
+5 VA
LS1
AOUT
R41
C41
Q6
NPN
Figure 3. AOUT PWM Circuit for Call Progress
Table 6. Component Values—AOUT PWM
Component
LS1
Q6
C41
R41
Value
Speaker BRT1209PF-06
NPN KSP13
0.1 µF, 16 V, X7R, ±20%
150 Ω, 1/16 W, ±5%
Supplier
Intervox
Fairchild
Venkel, SMEC
Venkel, SMEC, Panasonic
Registers 20 and 21 allow the receive and transmit paths to be attenuated linearly. When these registers are set to
all 0s, the receive and transmit paths are muted. These registers affect the call progress output only and do not
affect transmit and receive operations on the telephone line.
The PWMM[1:0] bits (Register 1, bits 5:4) select one of the three different PWM output modes for the AOUT signal,
including a delta-sigma data stream, a 32 kHz return to zero PWM output, and balanced 32 kHz PWM output.
Preliminary Rev. 0.9
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SI306x.PDF ] | |
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