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PDF LT1394 Data sheet ( Hoja de datos )
| Número de pieza | LT1394 | |
| Descripción | 7ns/ Low Power/ Single Supply/ Ground-Sensing Comparator | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LT1394
7ns, Low Power,
Single Supply, Ground-Sensing
Comparator
FEATURES
DESCRIPTIO
s UltraFastTM: 7ns
s Low Power: 6mA
s Low Offset Voltage: 0.8mV
s Operates Off Single 5V or Dual ±5V Supplies
s Input Common Mode Extends to Negative Supply
s No Minimum Input Slew Rate Requirement
s Complementary TTL Outputs
s Inputs Can Exceed Supplies without Phase Reversal
s Pin Compatible with LT1016, LT1116 and LT1671
s Output Latch Capability
s Available in 8-Lead MSOP and SO Packages
U
APPLICATIO S
s High Speed A/D Converters
s Zero-Crossing Detectors
s Current Sense for Switching Regulators
s Extended Range V/F Coverters
s Fast Pulse Height/Width Discriminators
s High Speed Triggers
s Line Receivers
s High Speed Sampling Circuits
, LTC and LT are registered trademarks of Linear Technology Corporation.
UltraFast is a trademark of Linear Technology Corporation.
The LT®1394 is an UltraFast(7ns) comparator with comple-
mentary outputs and latch. The input common mode range
extends from 1.5V below the positive supply down to the
negative supply rail. Like the LT1016, LT1116 and LT1671,
this comparator has complementary outputs designed to
interface directly to TTL or CMOS logic. The LT1394 may
operate from either a single 5V supply or dual ±5V supplies.
Low offset voltage specifications and high gain allow the
LT1394 to be used in precision applications.
The LT1394 is designed for improved speed and stability for
a wide range of operating conditions. The output stage
provides active drive in both directions for maximum speed
into TTL, CMOS or passive loads with minimal cross-conduc-
tion current. Unlike other fast comparators, the LT1394
remains stable even for slow transitions through the active
region, which eliminates the need to specify a minimum input
slew rate.
The LT1394 has an internal, TTL/CMOS compatible latch for
retaining data at the outputs. The latch holds data as long as
the LATCH pin is held high. Device parameters such as gain,
offset and negative power supply current are not significantly
affected by variations in negative supply voltage.
TYPICAL APPLICATIO
45MHz Single Supply Adaptive Trigger
2k 5V
2k
5V
10µF +
36
15
Q1 Q2
5V 2 4 3M
+
A1
LT1227
–
0.005µF
500pF
0.005µF
750Ω
510Ω
36Ω
13 10
14 12
Q3 Q4
15 11
+
0.1µF
100µF
0.1µF
2k
3M
INPUT
5V
+
A2
–LT1006
470Ω
0.1µF
470Ω
Q1, Q2, Q3, Q4 = CA3096 ARRAY:
TIE SUBSTRATE (PIN 16) TO GROUND
= 1N4148
+
LT1394
–
TRIGGER
OUT
1394 F18
Propagation Delay vs
Input Overdrive
12
TA = 25°C
10
VSTEP = 100mV
VS = ±5V
8
tPDLH
6
tPDHL
4
2
0
0 10 20 30 40
OVERDRIVE (mV)
50
1394 TA02
1
1 page  
LT1394
TYPICAL PERFORMANCE CHARACTERISTICS
Negative Common Mode Limit vs
Temperature
1
0 VS = SINGLE 5V
–1
–2
–3
–4
–5 VS = ±5V
–6
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
LT1394 G09
Positive Supply Current vs
V+ Supply Voltage
10
9
V– = 0V
VIN = –60mV
8 IOUT = 0
7
6
TA = 125°C
5
4
TA = 25°C
3
2
TA = –55°C
1
0
01 2 34 56
SUPPLY VOLTAGE (V)
78
1394 G12
Output Low Voltage (VOL) vs
Output Sink Current
0.8
VS = ±5V
0.7 ∆VIN = 30mV
0.6
0.5
0.4
0.3 TA = –55°C
TA = 125°C
TA = 25°C
0.2
0.1
0
0 2 4 6 8 10 12 14 16
OUTPUT SINK CURRENT (mA)
1394 G10
Positive Supply Current vs
Switching Frequency
16
VS = ±5V
14
TA = 25°C
12
10
TA = 125°C
8
6
4 TA = –55°C
2
0
1 10 100
SWITCHING FREQUENCY (MHz)
1394 G13
Output High Voltage (VOH) vs
Output Source Current
5.0
VS = ±5V
4.5 ∆VIN = –30mV
4.0
TA = 125°C
3.5
TA = 25°C
3.0
TA = –55°C
2.5
2.0
1.5
1.0
0
2 4 6 8 10 12 14 16
OUTPUT SOURCE CURRENT (mA)
1394 G11
Negative Supply Current vs
V – Supply Voltage
4
V+ = 5V
∆VIN = –60mV
3
2 TA = 125°C
TA = 25°C
1 TA = –55°C
0
–8 –7 –6 –5 –4 –3 –2 –1
NEGATIVE SUPPLY VOLTAGE (V)
0
1394 G14
Latch Pin Current vs Temperature
8
VS = ±5V
7 VLATCH = 0V
6
5
4
3
2
1
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
LT1394 G15
Response to 100MHz ±10mV
Sine Wave
+ IN
20mVP-P
3V
Q
OUT
0V
FET PROBES
5ns/DIV
10mV/DIV
1V/DIV
1394 G16
5
5 Page 
LT1394
APPLICATIONS INFORMATION
A1 has poorly defined DC characteristics, necessitating
some form of DC correction. A2 and A3, operating at a
differential gain of 100, provide this function. They differ-
entially sense a band limited version of A1’s inputs and feed
DC and low frequency amplified information to the com-
parator. The low frequency roll-off of A1’s signal path
complements A2-A3’s high frequency roll-off. The sum-
mation of these two signal channels at the LT1394 inputs
results in flat response from DC to high frequency.
Figure 8 shows waveforms for the high gain comparator.
Trace A is a 500µV overdrive on a 1mV step applied to the
circuit’s positive input (negative input grounded). Trace B
shows the resulting amplified step at A1’s positive output.
Trace C is A2’s band limited output. A1’s wideband output
combines with A2’s DC corrected information to yield the
correct, amplified composite signal at the LT1394’s posi-
tive input in Trace D. The LT1394’s output is Trace E. Figure
9 details circuit propagation delay. The output responds in
18ns to a 500µV overdrive on a 1mV step. Figure 10 plots
response time versus overdrive. As might be expected,
propagation delay decreases at higher overdrives. A1’s
noise limits usable sensitivity.
1100
1000
900
800
700
600
A = 1mV/DIV
B = 0.1V/DIV
(AC-COUPLED)
C = 0.1V/DIV
D = 0.1V/DIV
E = 5V/DIV
5µs/ DIV
1394 F08
Figure 8. 500µV Input (Trace A) Is Split into Wideband
and Low Frequency Gain Paths (Traces B and C) and
Recombined (Trace D). Comparator Output Is Trace E
A = 1mV/DIV
B = 1V/DIV
10ns/ DIV
1394 F09
Figure 9. Parallel Path Comparator Shows 18ns
Response (Trace B) to 500µV Overdrive (Trace A)
500
15
16 17
RESPONSE TIME (ns)
18
1394 F10
Figure 10. Response Time vs Overdrive for the
Composite Comparator
Voltage-Controlled Delay
The ability to set a precise, predictable delay has broad
application in pulse circuitry. Figure 11’s configuration
sets a 0 to 300ns delay from a corresponding 0V to 3V
control voltage. It takes advantage of the LT1394’s speed
and the clean dynamics of an emitter switched current
source.
Q1 and Q2 form a current source that charges the 1000pF
capacitor. When the trigger input is high (Trace A, Figure
12) both Q3 and Q4 are on. The current source is off and
Q2’s collector (Trace B) is at ground. The latch input at the
LT1394 prevents it from responding and its output remains
high. When the trigger input goes low, the LT1394’s latch
input is disabled and its output drops low. Q4’s collector
(Trace C) lifts and Q2 comes on, delivering constant
current to the 1000pF capacitor (Trace B). The resulting
linear ramp at the LT1394’s positive input is compared to
the delay programming voltage input. When a crossing
occurs, the comparator goes high (Trace D). The length of
time the comparator was low is directly proportional to the
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LT1394.PDF ] | |
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