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PDF MB15C02 Data sheet ( Hoja de datos )

Número de pieza MB15C02
Descripción Single Serial Input PLL Frequency Synthesizer On-Chip prescaler
Fabricantes Fujitsu 
Logotipo Fujitsu Logotipo



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No Preview Available ! MB15C02 Hoja de datos, Descripción, Manual

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04–21348–3E
ASSP
Single Serial Input
PLL Frequency Synthesizer
On-Chip prescaler
MB15C02
s DESCRIPTION
The Fujitsu MB15C02 is a serial input Phase Locked Loop (PLL) frequency synthesizer with a prescaler. A 64/65
division is available for the prescaler that enables pulse swallow operation.
This operates with a supply voltage of 1.0 V (min.).
MB15C02 is suitable for mobile communications, such as paging systems.
s FEATURES
• High frequency operation: 220 MHz max @VDD = 1.0 V to 1.5 V
330 MHz max @VDD = 1.2 V to 1.5 V
450 MHz max @VDD = 1.3 V to 1.5 V
• Single power supply : VDD = 1.0 to 1.5 V
• Power saving function
• Pulse swallow function: 64/65
• Serial input 14-bit programmable reference divider: R = 5 to 16,383
• Serial input 18-bit programmable divider consisting of:
- Binary 6-bit swallow counter: 0 to 63
- Binary 12-bit programmable counter: 5 to 4,095
• Wide operating temperature: Ta = –20 to 60°C
s PACKAGES
16-pin, Plastic SSOP
20-pin, Plastic SSOP
(FPT-16P-M05)
(FPT-20P-M03)
1

1 page




MB15C02 pdf
s BLOCK DIAGRAM
MB15C02
VDD
Clock
Data
LE
fin
PS
LD
Do
Intermittent
mode control
circuit
Control
register
Programmable
reference divider
Binary 14-bit
reference counter
14
14-bit latch
14
18-bit shift register
18
18-bit latch
6 12
Crystal
oscillator
circuit
VSS
OSCIN
fr
Phase
comparator
fp
Output
control
circuit
OSCOUT
TEST
FC
φP
Output
control
circuit
φR
Prescaler
Binary 6-bit
swallow
counter
Binary 12-bit
programma-
ble counter
Lock detector
Control circuit
Charge
pump
VP
5

5 Page





MB15C02 arduino
MB15C02
(d) Lock detector
The lock detector detects the lock and unlock states of the PLL. The lock detector outputs “H” when the PLL
enters the lock state and outputs “L” when the PLL enters the unlock state as shown in Figure 2. When PS =
“L”, the lock detector outputs “H” compulsorily.
fr
fp
LD
Figure 2. Phase comparator input/output waveforms (Lock detector)
11

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