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PDF MH8V724AWZJ-6 Data sheet ( Hoja de datos )
| Número de pieza | MH8V724AWZJ-6 | |
| Descripción | FAST PAGE MODE 603979776 - BIT ( 8388608 - WORD BY 72 - BIT ) DYNAMIC RAM | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V724AWZJ -5, -6
FAST PAGE MODE 603979776 - BIT ( 8388608 - WORD BY 72 - BIT ) DYNAMIC RAM
DESCRIPTION
The MH8V724AWZJ is 8388608-word x 72-bit dynamic
ram module. This consist of nine industry standard 8M x 8
dynamic RAMs in SOJ and one industry standard EEPROM
in TSSOP.
The mounting of SOJs and TSSOP on a card edge dual
in-line package provides any application where high
densities and large of quantities memory are required.
This is a socket-type memory module ,suitable for easy
interchange or addition of module.
FEATURES
Type name
/RAS /CAS Address /OE Cycle Power
access access access access
time time time time time dissipation
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.W)
MH8V724AWZJ-5 50 13 25 13 90 3.51
MH8V724AWZJ-6 60 15 30 15 110 2.93
PIN CONFIGURATION
85pin 1pin
94pin
95pin
10pin
11pin
Utilizes industry standard 8M x 8 RAMs in SOJ and industry
standard EEPROM in TSSOP
168-pin (84-pin dual dual in-line package)
Single +3.3V(±0.3V) supply operation
Low stand-by power dissipation
9.72mW(Max) . . . . . . . . . . . . . . . . . . . LVCMOS input level
Low operation power dissipation
MH8V724AWZJ -5 . . . . . . . . . . . . . . . . . . 4.22W(Max)
MH8V724AWZJ -6 . . . . . . . . . . . . . . . . . . 3.89W(Max)
All input are directly LVTTL compatible
All output are three-state and directly LVTTL compatible
Includes(0.22uF x 9) decoupling capacitors
4096 refresh cycle every 64ms
Fast-page mode,Read-modify-write,
/CAS before /RAS refresh,Hidden refresh capabilities
Gold plating contact pads
Row Address A0 ~ A11
Column Address A0 ~ A10
APPLICATION
Main memory unit for computers , Microcomputer memory
BACK SIDE
124pin 40pin
125pin 41pin
FRONT SIDE
168pin 84pin
MIT-DS-0094-0.5
MITSUBISHI
ELECTRIC
( 1 / 20 )
27/Feb./1997
1 page  
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V724AWZJ -5, -6
FAST PAGE MODE 603979776 - BIT ( 8388608 - WORD BY 72 - BIT ) DYNAMIC RAM
FUNCTION
The MH8V724AWZJ provide, in addition to normal
read, write, and read-modify-write operations,
a number of other functions, e.g., Fast page mode, /RAS-
only refresh, and delayed-write. The input conditions for
each are shown in Table 1.
Table 1 Input conditions for each mode
Operation
Read
Write (Early write)
Write (Delayed write)
Read-modify-write
/CAS before /RAS refresh
Standby
/RAS
ACT
ACT
ACT
ACT
ACT
NAC
/CAS
ACT
ACT
ACT
ACT
ACT
DNC
Inputs
/W
NAC
ACT
ACT
ACT
NAC
DNC
/OE
ACT
DNC
DNC
ACT
DNC
DNC
aRddorwess aCdodluremsns
APD APD
APD APD
APD APD
APD APD
DNC DNC
DNC DNC
Input/Output
Refresh
Input Output
OPN VLD YES
VLD OPN YES
VLD IVD YES
VLD VLD YES
DNC OPN YES
DNC OPN NO
Remark
Fast page
mode
identical
Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : Invalid, APD : applied, OPN : open
MIT-DS-0094-0.5
MITSUBISHI
ELECTRIC
( 5 / 20 )
27/Feb./1997
5 Page 
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V724AWZJ -5, -6
FAST PAGE MODE 603979776 - BIT ( 8388608 - WORD BY 72 - BIT ) DYNAMIC RAM
Write Cycle (Early write)
RAS
VIH
VIL
CAS
VIH
VIL
Address
VIH
VIL
tCRP
tWC
tRAS
tRCD
tCSH
tRSH
tCAS
tASR
tRAH
ROW
ADDRESS
tASC
tCAH
COLUMN
ADDRESS
VIH
W
VIL
DQ
(INPUTS)
VIH
VIL
tWCS
tWCH
tDH
tDS
DATA VALID
tRP
tRPC
tCRP
tASR
ROW
ADDRESS
DQ
(OUTPUTS)
VOH
VOL
VIH
OE
VIL
Hi-Z
MIT-DS-0094-0.5
MITSUBISHI
ELECTRIC
( 11 / 20 )
27/Feb./1997
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet MH8V724AWZJ-6.PDF ] | |
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