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PDF MH4S64CBMD-10B Data sheet ( Hoja de datos )
| Número de pieza | MH4S64CBMD-10B | |
| Descripción | 268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH4S64CBMD-10,-12,-15,-10B,-12B,-15B
268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM
DESCRIPTION
The MH4S64CBMD is 4194304-word by 64-bit
Synchronous DRAM module. This consists of sixteen
industry standard 2Mx8 Synchronous DRAMs in
TSOP and one industory standard EEPROM in
TSSOP.
The mounting of TSOP on a card edge Dual Inline
package provides any application where high
densities and large quantities of memory are
required.
This is a socket type - memory modules, suitable for
easy interchange or addition of modules.
FEATURES
Frequency
-10,-10B 100MHz
CLK Access Time
(Component SDRAM)
8ns(CL=3)
-12,-12B 83MHz
8ns(CL=3)
-15,-15B 67MHz
9ns(CL=3)
Utilizes industry standard 2M x 8 Synchronous DRAMs
TSOP and industry standard EEPROM in TSSOP
168-pin (84-pin dual in-line package)
single 3.3V±0.3V power supply
Clock frequency 100MHz/83MHz/67MHz
Fully synchronous operation referenced to clock rising
edge
Dual bank operation controlled by BA(Bank Address)
/CAS latency- 1/2/3(programmable)
Burst length- 1/2/4/8(programmable)
Burst type- sequential / interleave(programmable)
Column access - random
Auto precharge / All bank precharge controlled by A10
Auto refresh and Self refresh
4096 refresh cycle /64ms
LVTTL Interface
85pin 1pin
94pin
95pin
10pin
11pin
124pin 40pin
125pin 41pin
168pin 84pin
APPLICATION
main memory or graphic memory in computer systems
MIT-DS-0113-1.1
MITSUBISHI
ELECTRIC
( 1 / 47 )
25.Mar..1997
1 page  
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH4S64CBMD-10,-12,-15,-10B,-12B,-15B
268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM
Serial Presence Detect Table
29 RAS to CAS Delay Min
30 Active to Precharge Min
31
32-61
62
63
Density of each bank on module
Superset Information (may be used in future)
SPD Revision
Checksum for bytes 0-62
64-71
72
Manufactures Jedec ID code per JEP-108E
Manufacturing location
73-90
Manufactures Part Number
91-92
93-94
95-98
99-125
126
127
128+
Revision Code
Manufacturing date
Assembly Serial Number
Manufacture Specific Data
Intetl specification frequency
Intel specification CAS# Latency support
Unused storage locations
-10 30ns
1E
-12 30ns
1E
-15 30ns
1E
-10 60ns
3C
-12 70ns
46
-15 80ns
50
16MByte
04
option
00
rev 1
01
Check sum for -10
A0
Check sum for -12
D3
Check sum for -15
73
MITSUBISHI
1CFFFFFFFFFFFFFF
Miyoshi,Japan
01
Tajima,Japan
02
NC,USA
03
Germany
04
MH4S64CBMD-10
4D483453363443424D442D31302020202020
MH4S64CBMD-12
4D483453363443424D442D31322020202020
MH4S64CBMD-15
MH4S64CBMD-10B
4D483453363443424D442D31352020202020
4D483453363443424D442D31304220202020
MH4S64CBMD-12B 4D483453363443424D442D31324220202020
MH4S64CBMD-15B 4D483453363443424D442D31354220202020
PCB revision
rrrr
year/week code
yyww
serial number
ssssssss
option
00
66MHz
66
CL=3: 04H, CL=2/3: 06H
06
open
00
MIT-DS-0113-1.1
MITSUBISHI
ELECTRIC
( 5 / 47 )
25.Mar..1997
5 Page 
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH4S64CBMD-10,-12,-15,-10B,-12B,-15B
268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM
FUNCTION TRUTH TABLE(continued)
Current State
PRE -
CHARGING
ROW
ACTIVATING
WRITE RE-
COVERING
/S /RAS /CAS /WE Address
Command
Action
H X X XX
DESEL NOP(Idle after tRP)
L H H HX
NOP
NOP(Idle after tRP)
L H H L BA
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT
ILLEGAL*2
L L H L BA,A10
PRE/PREA NOP*4(Idle after tRP)
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
H X X XX
DESEL NOP(Row Active after tRCD
L H H HX
NOP
NOP(Row Active after tRCD
L H H L BA
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT
ILLEGAL*2
L L H L BA,A10
PRE/PREA ILLEGAL*2
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
H X X XX
DESEL NOP
L H H HX
NOP
NOP
L H H L BA
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT
ILLEGAL*2
L L H L BA,A10
PRE/PREA ILLEGAL*2
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
MIT-DS-0113-1.1
MITSUBISHI
ELECTRIC
( 11 / 47 )
25.Mar..1997
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MH4S64CBMD-10B.PDF ] | |
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