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PDF MH32S64PFJ-7 Data sheet ( Hoja de datos )

Número de pieza MH32S64PFJ-7
Descripción 2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
Fabricantes Mitsubishi 
Logotipo Mitsubishi Logotipo



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Preliminary Spec.
Some contents are subject to change without
notice.
MITSUBISHI LSIs
MH32S64PFJ -6, -6L -7,-7L
2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
DESCRIPTION
The MH32S64PFJ is 33554432 - word by 64-bit
Synchronous DRAM module. This consists of eight
industry standard 16Mx16 Synchronous DRAMs in
TSOP and one industory standard EEPROM in
TSSOP.
The mounting of TSOP on a card edge Dual
Inline package provides any application where
high densities and large quantities of memory are
required.
This is a socket type - memory modules, suitable
for easy interchange or addition of modules.
FEATURES
-6,-6L
-7,-7L
Frequency
133MHz
100MHz
CLK Access Time
(Component SDRAM)
5.4 ns(CL=3)
6.0ns(CL=2)
PC133/100 Compliant
Utilizes industry standard 16M x 16 Synchronous
DRAMs TSOP and industry standard EEPROM in
TSSOP
144-pin (72-pin dual in-line package)
single 3.3V±0.3V power supply
Fully synchronous operation referenced to clock rising
edge
4 bank operation controlled by BA0,1(Bank Address)
/CAS latency- 2/3(programmable)
Burst length- 1/2/4/8/Full Page(programmable)
Burst type- sequential / interleave(programmable)
Column access - random
Auto precharge / All bank precharge controlled by A10
Auto refresh and Self refresh
8192 refresh cycle /64ms
LVTTL Interface
APPLICATION
main memory or graphic memory in computer systems
PCB Outline
(Front)
(Back)
1
2
MIT-DS-0337-0.2
MITSUBISHI
ELECTRIC
( 1 / 55 )
143
144
26.Apr.2001

1 page




MH32S64PFJ-7 pdf
Preliminary Spec.
Some contents are subject to change without
notice.
MITSUBISHI LSIs
MH32S64PFJ -6, -6L -7,-7L
2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
Serial Presence Detect Table II
31 Density of each bank on module
32 Command and Address signal input setup time
33 Command and Address signal input hold time
34 Data signal input setup time
35 Data signal input hold time
36-61
62
Superset Information (may be used in future)
SPD Revision
63 Checksum for bytes 0-62
-6
-7
-6
-7
-6
-7
-6
-7
64-71
72
Manufactures Jedec ID code per JEP-108E
Manufacturing location
73-90
Manufactures Part Number
91-92
93-94
95-98
99-125
126
Revision Code
Manufacturing date
Assembly Serial Number
Manufacture Specific Data
Intetl specification frequency
128MByte
1.5ns
2ns
0.8ns
1ns
1.5ns
2ns
0.8ns
1ns
option
rev 1.2B
Check sum for -6
Check sum for -7
MITSUBISHI
Miyoshi,Japan
Tajima,Japan
NC,USA
Germany
MH32S64PFJ-6
MH32S64PFJ-6L
MH32S64PFJ-7
MH32S64PFJ-7L
PCB revision
year/week code
serial number
option
100MHz
127
128+
Intel specification CAS# Latency support
Unused storage locations
-6,-7 CL=2/3,AP,CK0,1
open
The -6, -7 indicate also -6L, -7L.
20
15
20
08
10
15
20
08
10
00
12
BA
21
1CFFFFFFFFFFFFFF
01
02
03
04
4D48333253363450464A2D36202020202020
4D48333253363450464A2D364C2020202020
4D48333253363450464A2D37202020202020
4D48333253363450464A2D374C2020202020
rrrr
yyww
ssssssss
00
64
CF
00
MIT-DS-0337-0.2
MITSUBISHI
ELECTRIC
( 5 / 55 )
26.Apr.2001

5 Page





MH32S64PFJ-7 arduino
Preliminary Spec.
Some contents are subject to change without
notice.
MITSUBISHI LSIs
MH32S64PFJ -6, -6L -7,-7L
2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
FUNCTION TRUTH TABLE(continued)
Current State
PRE -
CHARGING
ROW
ACT IVATING
WRITE RE-
COVERING
/S /RAS /CAS /WE Address
Command
Action
H X X XX
DESEL NOP(Idle after tRP)
L H H HX
NOP
NOP(Idle after tRP)
L H H LX
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT ILLEGAL*2
L L H L BA,A10
PRE/PREA NOP*4(Idle after tRP)
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
H X X XX
DESEL NOP(Row Active after tRCD
L H H HX
NOP
NOP(Row Active after tRCD
L H H LX
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT ILLEGAL*2
L L H L BA,A10
PRE/PREA ILLEGAL*2
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
H X X XX
DESEL NOP
L H H HX
NOP
NOP
L H H LX
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT ILLEGAL*2
L L H L BA,A10
PRE/PREA ILLEGAL*2
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
MIT-DS-0337-0.2
MITSUBISHI
ELECTRIC
( 11 / 55 )
26.Apr.2001

11 Page







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