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PDF PI5A3158 Data sheet ( Hoja de datos )

Número de pieza PI5A3158
Descripción SOTINYTM Low Voltage Dual SPDT Analog Switch 2:1 Mux/DeMux Bus Switch
Fabricantes Pericom Semiconductor Corporation 
Logotipo Pericom Semiconductor Corporation Logotipo



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PI5A3158
SOTINYTM Low Voltage Dual SPDT Analog Switch
2:1 Mux/DeMux Bus Switch
Features
• CMOS Technology for Bus and Analog Applications
• Low On-Resistance: 8Ω at 3.0V
• Wide VCC Range: 1.65V to 5.5V
• Rail-to-Rail Signal Range
• Control Input Overvoltage Tolerance: 5.5V min.
• Fast Transition Speed: 5.2ns max. at 5V
• High Off Isolation: 57dB at 10MHz
• 54dB (10MHz) Crosstalk Rejection Reduces Signal Distortion
• Break-Before-Make Switching
• High Bandwidth: 250 MHz
• Extended Industrial Temperature Range: –40°C to 85°C
• Packaging (Pb-free & Green available):
-12-contact TDFN (ZA)
Description
The PI5A3158 is a dual high-bandwidth, fast single-pole double-
throw (SPDT) CMOS switch. It can be used as an analog switch or
as a low-delay bus switch. Specified over a wide operating power
supply voltage range, 1.65V to 5.5V, the PI5A3158 has a maximum
On-Resistance of 12Ω at 1.65V, 9Ω at 2.3V & 6Ω at 4.5V.
Break-before-make switching prevents both switches being
enabled simultaneously. This eliminates signal disruption during
switching.
The control input, S, tolerates input drive signals up to 5.5V,
independent of supply voltage.
Connection Diagram
Applications
• Cell Phones
• PDAs
• Portable Instrumentation
• Battery Powered Communications
• Computer Peripherals
A0 1
0B0 2
12 VCC
11 1B0
Pin Description
Pin Number Name
8, 11
3, 6
1BX
GND
2, 5
1, 4
9, 12
7, 10
Notes:
1. x = 0 or 1
0BX
AX
VCC
SX
Description
Data port (Normally Open)
Ground
Data port (Normally Closed)
Common Output/data port
Positive Power Supple
Logic Controll
Logic Function Table
Logic Input(s)
0
1
Function
0BX Connection to AX
1BX Connected to AX
GND 3
A1 4
0B1 5
GND 6
10 S0
9 VCC
8 1B1
7 S1
1
PS8637B
07/26/04

1 page




PI5A3158 pdf
PI5A3158
SOTINYTM Low Voltage Dual SPDT Analog Switch
2:1 Mux/DeMux Bus Switch
Test Circuits and Timing Diagrams
From
Output
Under
Test
CL
10pF
100
Notes: Input driven by 50W source terminated in 50.
CL includes load and stray capacitance.
Input PRR = 1.0 MHz; tw = 500ns.
Figure 1. AC Test Circuit
tr = 2.5ns
SWITCH
INPUT
10%
OUTPUT
90%
50%
tPLH
90%
50%
tW
tr = 2.5ns
VCC
10%
tPHL
GND
VOH
tr = 2.5ns
CONTROL
INPUT
10%
OUTPUT
90%
50%
90%
50%
tPZL
50%
50%
50%
tPZH
VOL OUTPUT
50%
Figure 2. AC Waveforms
tr = 2.5ns
VCC
10%
tPLZ
GND
VTRI
VOL+0.3V
VOL
tPHZ
VOH
VOH –0.3V
VTRI
VIN
Logic
Input
B0
B1
A
A
VOUT
RL CL
Logic
Input
VOUT
0.9 x VOUT
tD
Figure 3. Break Before Make Interval Timing
5
PS8637B
07/26/04

5 Page










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