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ON Semiconductor |
MC10138
Bi-Quinary Counter
The MC10138 is a four bit counter capable of divide by two, five, or
ten functions. It is composed of four set–reset master–slave flip–flops.
Clock inputs trigger on the positive going edge of the clock pulse.
Set or reset input override the clock, allowing asynchronous “set” or
“clear.” Individual set and common reset inputs are provided, as well
as complementary outputs for the first and fourth bits.
• PD = 370 mW typ/pkg (No Load)
• ftog = 150 MHz typ
• tr, tf = 2.5 ns typ (20%–80%)
S0 Q0
11 15
LOGIC DIAGRAM
S1 Q1
10 13
S2 Q2
64
S3 Q3
52
12
Clock
S
D1 Q
Q'
C1 Q
R
S
D1 Q
D2 Q'
C2 Q
R
S
D1 Q
C1 Q'
C2 Q
R
S
D1 Q'
D2 Q
C2 Q
R
9
Reset
14
Q0
7
C2
www.DataSheet4U3.com
Q3
VCC1 = PIN 1; VCC2 = PIN 16; VEE = PIN 8
DIP PIN ASSIGNMENT
VCC1
Q3
1
2
Q3 3
Q2 4
S3 5
S2 6
C2 7
VEE 8
16 VCC2
15 Q0
14 Q0
13 Q1
12 C1
11 S0
10 S1
9 RESET
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10138L
AWLYYWW
1
16
MC10138P
AWLYYWW
1
1
10138
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10138L
CDIP–16
25 Units / Rail
MC10138P
PDIP–16
25 Units / Rail
MC10138FN
PLCC–20
46 Units / Rail
© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10138/D
MC10138
COUNTER TRUTH TABLES
BI–QUINARY
BCD
(Clock connected to C2
(Clock connected to C1
and Q3 connected to C1)
and Q0 connected to C2)
COUNT Q1 Q2 Q3 Q0
COUNT Q0 Q1 Q2 Q3
0 LLLL
1 HLLL
2 LHLL
3 HHL L
0 LLLL
1 HLLL
2 LHLL
3 HHL L
4 LLHL
5 LLLH
6 HLLH
7 LHLH
4 LLHL
5 HLHL
6 LHHL
7 HHHL
8 HHLH
9 L LHH
8 LLLH
9 HLLH
COUNTER STATE DIAGRAM — POSITIVE LOGIC
CLOCK CONNECTED TO C2
0
Q0 CONNECTED TO C2
01
23
4
47
1
5
6
32
14 10 11
15 12 13
98 76 5
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